/third_party/mesa3d/src/compiler/nir/ |
H A D | nir_format_convert.h | 29 nir_shift_imm(nir_builder *b, nir_ssa_def *value, int left_shift) in nir_shift_imm() argument 31 if (left_shift > 0) in nir_shift_imm() 32 return nir_ishl(b, value, nir_imm_int(b, left_shift)); in nir_shift_imm() 33 else if (left_shift < 0) in nir_shift_imm() 34 return nir_ushr(b, value, nir_imm_int(b, -left_shift)); in nir_shift_imm() 40 nir_shift(nir_builder *b, nir_ssa_def *value, nir_ssa_def *left_shift) in nir_shift() argument 43 nir_ige(b, left_shift, nir_imm_int(b, 0)), in nir_shift() 44 nir_ishl(b, value, left_shift), in nir_shift() 45 nir_ushr(b, value, nir_ineg(b, left_shift))); in nir_shift() 50 uint32_t mask, int left_shift) in nir_mask_shift() 49 nir_mask_shift(struct nir_builder *b, nir_ssa_def *src, uint32_t mask, int left_shift) nir_mask_shift() argument [all...] |
/third_party/skia/src/utils/ |
H A D | SkUTF.cpp | 9 static constexpr inline int32_t left_shift(int32_t value, int32_t shift) { in left_shift() function 135 hic = left_shift(hic, 1); in NextUTF8() 148 } while ((hic = left_shift(hic, 1)) < 0); in NextUTF8()
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/third_party/node/deps/v8/src/execution/arm64/ |
H A D | simulator-arm64.cc | 1123 T Simulator::ExtendValue(T value, Extend extend_type, unsigned left_shift) { 1160 return static_cast<T>(static_cast<unsignedT>(value) << left_shift); 1848 unsigned left_shift = instr->ImmExtendShift(); 1850 uint64_t op2 = ExtendValue(xreg(instr->Rm()), ext, left_shift); 1853 uint32_t op2 = ExtendValue(wreg(instr->Rm()), ext, left_shift); 5735 int left_shift = immhimmb - (8 << highestSetBit); 5738 shl(vf, rd, rn, left_shift); 5741 sli(vf, rd, rn, left_shift); 5744 sqshl(vf, rd, rn, left_shift); 5747 uqshl(vf, rd, rn, left_shift); [all...] |
H A D | simulator-arm64.h | 1540 T ExtendValue(T value, Extend extend_type, unsigned left_shift = 0);
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | assembler-arm64-inl.h | 972 Instr Assembler::ImmExtendShift(unsigned left_shift) { in ImmExtendShift() argument 973 DCHECK_LE(left_shift, 4); in ImmExtendShift() 974 return left_shift << ImmExtendShift_offset; in ImmExtendShift()
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H A D | assembler-arm64.cc | 3194 void Assembler::orr(const VRegister& vd, const int imm8, const int left_shift) { in orr() argument 3195 NEONModifiedImmShiftLsl(vd, imm8, left_shift, NEONModifiedImmediate_ORR); in orr() 3208 void Assembler::bic(const VRegister& vd, const int imm8, const int left_shift) { in bic() argument 3209 NEONModifiedImmShiftLsl(vd, imm8, left_shift, NEONModifiedImmediate_BIC); in bic() 3821 const int left_shift, in NEONModifiedImmShiftLsl() 3825 DCHECK((left_shift == 0) || (left_shift == 8) || (left_shift == 16) || in NEONModifiedImmShiftLsl() 3826 (left_shift == 24)); in NEONModifiedImmShiftLsl() 3836 cmode_1 = (left_shift >> in NEONModifiedImmShiftLsl() 3820 NEONModifiedImmShiftLsl(const VRegister& vd, const int imm8, const int left_shift, NEONModifiedImmediateOp op) NEONModifiedImmShiftLsl() argument 3886 EmitExtendShift(const Register& rd, const Register& rn, Extend extend, unsigned left_shift) EmitExtendShift() argument [all...] |
H A D | assembler-arm64.h | 479 void bic(const VRegister& vd, const int imm8, const int left_shift = 0); 568 void orr(const VRegister& vd, const int imm8, const int left_shift = 0); 2186 inline static Instr ImmExtendShift(unsigned left_shift); 2496 unsigned left_shift); 2553 const int left_shift,
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H A D | macro-assembler-arm64.h | 492 void Bic(const VRegister& vd, const int imm8, const int left_shift = 0) { in Bic() 494 bic(vd, imm8, left_shift); in Bic() 669 void Orr(const VRegister& vd, const int imm8, const int left_shift = 0) { in Orr() 671 orr(vd, imm8, left_shift); in Orr()
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/third_party/vixl/src/aarch64/ |
H A D | assembler-aarch64.cc | 4512 void Assembler::orr(const VRegister& vd, const int imm8, const int left_shift) { 4514 NEONModifiedImmShiftLsl(vd, imm8, left_shift, NEONModifiedImmediate_ORR); 4530 void Assembler::bic(const VRegister& vd, const int imm8, const int left_shift) { 4532 NEONModifiedImmShiftLsl(vd, imm8, left_shift, NEONModifiedImmediate_BIC); 6143 const int left_shift, 6147 VIXL_ASSERT((left_shift == 0) || (left_shift == 8) || (left_shift == 16) || 6148 (left_shift == 24)); 6158 cmode_1 = (left_shift >> [all...] |
H A D | simulator-aarch64.cc | 1068 unsigned left_shift) const { in Simulator() 1103 return ShiftOperand(reg_size, value, LSL, left_shift); in Simulator() 9318 int left_shift = immh_immb - (8 << highest_set_bit); in Simulator() local 9321 shl(vf, rd, rn, left_shift); in Simulator() 9324 sli(vf, rd, rn, left_shift); in Simulator() 9327 sqshl(vf, rd, rn, left_shift); in Simulator() 9330 uqshl(vf, rd, rn, left_shift); in Simulator() 9333 sqshlu(vf, rd, rn, left_shift); in Simulator() 9426 int left_shift = immh_immb - (8 << highest_set_bit); in Simulator() local 9430 shl(vf, rd, rn, left_shift); in Simulator() [all...] |
H A D | assembler-aarch64.h | 2740 void orr(const VRegister& vd, const int imm8, const int left_shift = 0); 2752 void bic(const VRegister& vd, const int imm8, const int left_shift = 0); 7392 static Instr ImmExtendShift(unsigned left_shift) { 7393 VIXL_ASSERT(left_shift <= 4); 7394 return left_shift << ImmExtendShift_offset; 8094 unsigned left_shift); 8197 const int left_shift,
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H A D | macro-assembler-aarch64.h | 3261 void Bic(const VRegister& vd, const int imm8, const int left_shift = 0) { in Bic() 3264 bic(vd, imm8, left_shift); in Bic() 3491 void Orr(const VRegister& vd, const int imm8, const int left_shift = 0) { in Orr() 3494 orr(vd, imm8, left_shift); in Orr()
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H A D | simulator-aarch64.h | 3316 unsigned left_shift = 0) const;
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