| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1157 __ ld4r(v14.V16B(), v15.V16B(), v16.V16B(), v17.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON()
1158 __ ld4r(v13.V16B(), in GenerateTestSequenceNEON()
1163 __ ld4r(v9.V16B(), in GenerateTestSequenceNEON()
1168 __ ld4r(v8.V1D(), v9.V1D(), v10.V1D(), v11.V1D(), MemOperand(x0)); in GenerateTestSequenceNEON()
1169 __ ld4r(v4.V1D(), in GenerateTestSequenceNEON()
1174 __ ld4r(v26.V1D(), in GenerateTestSequenceNEON()
1179 __ ld4r(v19.V2D(), v20.V2D(), v21.V2D(), v22.V2D(), MemOperand(x0)); in GenerateTestSequenceNEON()
1180 __ ld4r(v28.V2D(), in GenerateTestSequenceNEON()
1185 __ ld4r(v15.V2D(), in GenerateTestSequenceNEON()
1190 __ ld4r(v3 in GenerateTestSequenceNEON()
[all...] |
| H A D | test-cpu-features-aarch64.cc | 1269 TEST_NEON(ld4r_0, ld4r(v0.V8B(), v1.V8B(), v2.V8B(), v3.V8B(), MemOperand(x4)))
1271 ld4r(v0.V16B(), v1.V16B(), v2.V16B(), v3.V16B(), MemOperand(x4)))
1272 TEST_NEON(ld4r_2, ld4r(v0.V4H(), v1.V4H(), v2.V4H(), v3.V4H(), MemOperand(x4)))
1273 TEST_NEON(ld4r_3, ld4r(v0.V8H(), v1.V8H(), v2.V8H(), v3.V8H(), MemOperand(x4)))
1274 TEST_NEON(ld4r_4, ld4r(v0.V2S(), v1.V2S(), v2.V2S(), v3.V2S(), MemOperand(x4)))
1275 TEST_NEON(ld4r_5, ld4r(v0.V4S(), v1.V4S(), v2.V4S(), v3.V4S(), MemOperand(x4)))
1276 TEST_NEON(ld4r_6, ld4r(v0.V1D(), v1.V1D(), v2.V1D(), v3.V1D(), MemOperand(x4)))
1277 TEST_NEON(ld4r_7, ld4r(v0.V2D(), v1.V2D(), v2.V2D(), v3.V2D(), MemOperand(x4)))
1280 ld4r(v0.V8B(), v1.V8B(), v2.V8B(), v3.V8B(), MemOperand(x4, 4, PostIndex)))
1282 ld4r(v
[all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1888 void ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
|
| H A D | macro-assembler-arm64.h | 1699 ld4r(vt, vt2, vt3, vt4, src); in Ld4r()
|
| H A D | assembler-arm64.cc | 2447 void Assembler::ld4r(const VRegister& vt, const VRegister& vt2, in ld4r() function in v8::internal::Assembler
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1568 void ld4r(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2,
|
| H A D | simulator-arm64.cc | 5118 ld4r(vf, vreg(rt), vreg(rt2), vreg(rt3), vreg(rt4), addr);
|
| H A D | simulator-logic-arm64.cc | 484 void Simulator::ld4r(VectorFormat vform, LogicVRegister dst1, in ld4r() function in v8::internal::Simulator
|
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 3371 void ld4r(VectorFormat vform,
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| H A D | assembler-aarch64.h | 2943 void ld4r(const VRegister& vt,
|
| H A D | assembler-aarch64.cc | 2728 void Assembler::ld4r(const VRegister& vt, in ld4r() function in vixl::aarch64::Assembler
|
| H A D | logic-aarch64.cc | 373 void Simulator::ld4r(VectorFormat vform, in ld4r() function in vixl::aarch64::Simulator
|
| H A D | macro-assembler-aarch64.h | 3453 ld4r(vt, vt2, vt3, vt4, src); in Ld4r()
|
| H A D | simulator-aarch64.cc | 8562 ld4r(vf, in Simulator()
|