| /third_party/node/deps/openssl/openssl/crypto/aes/asm/ |
| H A D | aes-ia64.S | 83 # define LDKEY ld4
133 { .mmi; (p0) ld4 te33=[te33] // 2/0:te3[s3&0xff]
136 { .mmi; (p0) ld4 te30=[te30] // 2/1:te3[s0]
139 { .mmi; (p0) ld4 te22=[te22] // 3/0:te2[s2>>8]
142 { .mmi; (p0) ld4 te23=[te23] // 3/1:te2[s3>>8]
145 { .mmi; (p0) ld4 te20=[te20] // 4/2:te2[s0>>8]
148 { .mmi; (p0) ld4 te00=[te00] // 4/0:te0[s0>>24]
151 { .mmi; (p0) ld4 te21=[te21] // 5/3:te2[s1>>8]
154 { .mmi; (p0) ld4 te01=[te01] // 5/1:te0[s1>>24]
157 { .mmi; (p0) ld4 te1
[all...] |
| /third_party/openssl/crypto/aes/asm/ |
| H A D | aes-ia64.S | 83 # define LDKEY ld4
133 { .mmi; (p0) ld4 te33=[te33] // 2/0:te3[s3&0xff]
136 { .mmi; (p0) ld4 te30=[te30] // 2/1:te3[s0]
139 { .mmi; (p0) ld4 te22=[te22] // 3/0:te2[s2>>8]
142 { .mmi; (p0) ld4 te23=[te23] // 3/1:te2[s3>>8]
145 { .mmi; (p0) ld4 te20=[te20] // 4/2:te2[s0>>8]
148 { .mmi; (p0) ld4 te00=[te00] // 4/0:te0[s0>>24]
151 { .mmi; (p0) ld4 te21=[te21] // 5/3:te2[s1>>8]
154 { .mmi; (p0) ld4 te01=[te01] // 5/1:te0[s1>>24]
157 { .mmi; (p0) ld4 te1
[all...] |
| /third_party/node/deps/openssl/openssl/crypto/chacha/asm/ |
| H A D | chacha-ia64.pl | 57 { .mlx; ld4 @k[4]=[$key],8
59 { .mlx; ld4 @k[5]=[@k[11]],8
61 { .mlx; ld4 @k[6]=[$key],8
63 { .mlx; ld4 @k[7]=[@k[11]],8
65 { .mmi; ld4 @k[8]=[$key],8
66 ld4 @k[9]=[@k[11]],8
68 { .mmi; ld4 @k[10]=[$key]
69 ld4 @k[11]=[@k[11]]
71 { .mmi; ld4 @k[12]=[$counter],8
72 ld4
[all...] |
| /third_party/openssl/crypto/chacha/asm/ |
| H A D | chacha-ia64.pl | 55 { .mlx; ld4 @k[4]=[$key],8
57 { .mlx; ld4 @k[5]=[@k[11]],8
59 { .mlx; ld4 @k[6]=[$key],8
61 { .mlx; ld4 @k[7]=[@k[11]],8
63 { .mmi; ld4 @k[8]=[$key],8
64 ld4 @k[9]=[@k[11]],8
66 { .mmi; ld4 @k[10]=[$key]
67 ld4 @k[11]=[@k[11]]
69 { .mmi; ld4 @k[12]=[$counter],8
70 ld4
[all...] |
| /third_party/node/deps/openssl/openssl/crypto/ |
| H A D | ia64cpuid.S | 34 { .mii; ld4 r2=[r32]
229 ld4 r8=[r32] };;
240 ld4 r8=[r32] };;
264 ld4 r8=[r32] };;
278 ld4 r8=[r32]
|
| /third_party/openssl/crypto/ |
| H A D | ia64cpuid.S | 34 { .mii; ld4 r2=[r32]
229 ld4 r8=[r32] };;
240 ld4 r8=[r32] };;
264 ld4 r8=[r32] };;
278 ld4 r8=[r32]
|
| /third_party/node/deps/openssl/openssl/crypto/sha/asm/ |
| H A D | sha1-ia64.pl | 259 { .mlx; ld4 $h0=[ctx],8
261 { .mlx; ld4 $h1=[tmp0],8
263 { .mlx; ld4 $h2=[ctx],8
265 { .mlx; ld4 $h3=[tmp0]
267 { .mmi; ld4 $h4=[ctx],-16
|
| /third_party/openssl/crypto/sha/asm/ |
| H A D | sha1-ia64.pl | 259 { .mlx; ld4 $h0=[ctx],8
261 { .mlx; ld4 $h1=[tmp0],8
263 { .mlx; ld4 $h2=[ctx],8
265 { .mlx; ld4 $h3=[tmp0]
267 { .mmi; ld4 $h4=[ctx],-16
|
| /third_party/ffmpeg/libswscale/aarch64/ |
| H A D | hscale.S | 141 ld4 {v16.8B, v17.8B, v18.8B, v19.8B}, [sp] // transpose 8 bytes each from src into 4 registers
152 ld4 {v1.8H, v2.8H, v3.8H, v4.8H}, [x4], #64 // load filter idx + 0..7
192 ld4 {v16.8B, v17.8B, v18.8B, v19.8B}, [sp]
193 ld4 {v1.8H, v2.8H, v3.8H, v4.8H}, [x4], #64 // load filter idx + 0..7
|
| /third_party/node/deps/openssl/openssl/crypto/poly1305/asm/ |
| H A D | poly1305-ia64.S | 294 ld4 r24=[r10],8 // load nonce
297 { .mmi; ld4 r25=[r11],8
298 ld4 r26=[r10]
301 { .mmi; ld4 r27=[r11]
|
| /third_party/openssl/crypto/poly1305/asm/ |
| H A D | poly1305-ia64.S | 294 ld4 r24=[r10],8 // load nonce
297 { .mmi; ld4 r25=[r11],8
298 ld4 r26=[r10]
301 { .mmi; ld4 r27=[r11]
|
| /third_party/libunwind/libunwind/tests/ |
| H A D | ia64-test-rbs-asm.S | 149 ld4 loc##n = [in1], 4;; \
152 (p8) ld4.s loc##n = [r0]
155 ld4 r16 = [in1], 4;; \
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1088 __ ld4(v3.V16B(), v4.V16B(), v5.V16B(), v6.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON()
1089 __ ld4(v2.V16B(), in GenerateTestSequenceNEON()
1094 __ ld4(v5.V16B(), in GenerateTestSequenceNEON()
1099 __ ld4(v18.V2D(), v19.V2D(), v20.V2D(), v21.V2D(), MemOperand(x0)); in GenerateTestSequenceNEON()
1100 __ ld4(v4.V2D(), v5.V2D(), v6.V2D(), v7.V2D(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON()
1101 __ ld4(v29.V2D(), in GenerateTestSequenceNEON()
1106 __ ld4(v27.V2S(), v28.V2S(), v29.V2S(), v30.V2S(), MemOperand(x0)); in GenerateTestSequenceNEON()
1107 __ ld4(v24.V2S(), in GenerateTestSequenceNEON()
1112 __ ld4(v4.V2S(), v5.V2S(), v6.V2S(), v7.V2S(), MemOperand(x1, 32, PostIndex)); in GenerateTestSequenceNEON()
1113 __ ld4(v1 in GenerateTestSequenceNEON()
[all...] |
| H A D | test-cpu-features-aarch64.cc | 1332 TEST_NEON(ld4_0, ld4(v0.V8B(), v1.V8B(), v2.V8B(), v3.V8B(), MemOperand(x4)))
1334 ld4(v0.V16B(), v1.V16B(), v2.V16B(), v3.V16B(), MemOperand(x4)))
1335 TEST_NEON(ld4_2, ld4(v0.V4H(), v1.V4H(), v2.V4H(), v3.V4H(), MemOperand(x4)))
1336 TEST_NEON(ld4_3, ld4(v0.V8H(), v1.V8H(), v2.V8H(), v3.V8H(), MemOperand(x4)))
1337 TEST_NEON(ld4_4, ld4(v0.V2S(), v1.V2S(), v2.V2S(), v3.V2S(), MemOperand(x4)))
1338 TEST_NEON(ld4_5, ld4(v0.V4S(), v1.V4S(), v2.V4S(), v3.V4S(), MemOperand(x4)))
1339 TEST_NEON(ld4_6, ld4(v0.V2D(), v1.V2D(), v2.V2D(), v3.V2D(), MemOperand(x4)))
1342 ld4(v0.V8B(), v1.V8B(), v2.V8B(), v3.V8B(), MemOperand(x4, 32, PostIndex)))
1344 ld4(v0.V16B(),
1351 ld4(v
[all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1880 void ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1884 void ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
|
| H A D | macro-assembler-arm64.h | 1689 ld4(vt, vt2, vt3, vt4, src); in Ld4()
1694 ld4(vt, vt2, vt3, vt4, lane, src); in Ld4()
|
| H A D | assembler-arm64.cc | 2425 void Assembler::ld4(const VRegister& vt, const VRegister& vt2, in ld4() function in v8::internal::Assembler
2436 void Assembler::ld4(const VRegister& vt, const VRegister& vt2, in ld4() function in v8::internal::Assembler
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1564 void ld4(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2,
1566 void ld4(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2,
|
| H A D | simulator-arm64.cc | 4933 ld4(vf, vreg(reg[0]), vreg(reg[1]), vreg(reg[2]), vreg(reg[3]), addr[0]);
5183 ld4(vf, vreg(rt), vreg(rt2), vreg(rt3), vreg(rt4), lane, addr);
|
| H A D | simulator-logic-arm64.cc | 445 void Simulator::ld4(VectorFormat vform, LogicVRegister dst1, in ld4() function in v8::internal::Simulator
468 void Simulator::ld4(VectorFormat vform, LogicVRegister dst1, in ld4() function in v8::internal::Simulator
|
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 1074 VIXL_ASSERT(reg_count <= 4); // E.g. ld4/st4 in SetRegCount()
3358 void ld4(VectorFormat vform,
3364 void ld4(VectorFormat vform,
|
| H A D | assembler-aarch64.h | 2928 void ld4(const VRegister& vt,
2935 void ld4(const VRegister& vt,
|
| H A D | assembler-aarch64.cc | 2701 void Assembler::ld4(const VRegister& vt, in ld4() function in vixl::aarch64::Assembler
2714 void Assembler::ld4(const VRegister& vt, in ld4() function in vixl::aarch64::Assembler
|
| H A D | logic-aarch64.cc | 325 void Simulator::ld4(VectorFormat vform, in ld4() function in vixl::aarch64::Simulator
352 void Simulator::ld4(VectorFormat vform, in ld4() function in vixl::aarch64::Simulator
|
| H A D | macro-assembler-aarch64.h | 3434 ld4(vt, vt2, vt3, vt4, src); in Ld4()
3444 ld4(vt, vt2, vt3, vt4, lane, src); in Ld4()
|