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Searched refs:lane_count (Results 1 - 9 of 9) sorted by relevance

/third_party/vixl/src/aarch64/
H A Dlogic-aarch64.cc956 int lane_count = LaneCountFromFormat(vform); in pmull2() local
957 for (int i = 0; i < lane_count; i++) { in pmull2()
960 PolynomialMult(src1.Uint(vform_src, lane_count + i), in pmull2()
961 src2.Uint(vform_src, lane_count + i), in pmull2()
1092 int lane_count = LaneCountFromFormat(vform); in bic() local
1093 for (int i = 0; i < lane_count; ++i) { in bic()
1097 for (int i = 0; i < lane_count; ++i) { in bic()
1583 int lane_count = LaneCountFromFormat(vform); in clast() local
1585 ((last_active + offset_from_last_active) + lane_count) % lane_count; in clast()
1610 int lane_count = LaneCountFromFormat(vform); splice() local
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H A Dsimulator-aarch64.cc590 int lane_count = GetVectorLengthInBytes() / kDRegSizeInBytes; in Simulator() local
594 for (int lane = 0; lane < lane_count; lane++) { in Simulator()
608 int lane_count = GetPredicateLengthInBytes() / kHRegSizeInBytes; in Simulator() local
611 VIXL_ASSERT(lane_count <= UINT8_MAX); in Simulator()
614 for (int lane = 0; lane < lane_count; lane++) { in Simulator()
11305 int lane_count = LaneCountFromFormat(vform); in Simulator() local
11307 for (int i = 0; i < lane_count; i++) { in Simulator()
11343 int lane = reverse ? ((lane_count - 1) - i) : i; in Simulator()
/third_party/node/deps/v8/src/codegen/arm64/
H A Dregister-arm64.h323 static constexpr VRegister Create(int code, int size, int lane_count = 1) { in Create()
324 DCHECK(IsValidLaneCount(lane_count)); in Create()
326 lane_count); in Create()
425 constexpr explicit VRegister(const CPURegister& r, int lane_count) in VRegister() argument
426 : CPURegister(r), lane_count_(lane_count) {} in VRegister()
428 static constexpr bool IsValidLaneCount(int lane_count) { in IsValidLaneCount() argument
429 return base::bits::IsPowerOfTwo(lane_count) && lane_count <= 16; in IsValidLaneCount()
/third_party/vixl/src/aarch32/
H A Dinstructions-aarch32.h227 uint32_t lane_count = kDRegSizeInBits / kSRegSizeInBits;
228 VIXL_ASSERT(lane < lane_count);
229 VIXL_ASSERT(GetCode() * lane_count < kNumberOfSRegisters);
230 return SRegister(GetCode() * lane_count + lane);
372 uint32_t lane_count = kQRegSizeInBits / kDRegSizeInBits;
373 VIXL_ASSERT(lane < lane_count);
374 return DRegister(GetCode() * lane_count + lane);
379 uint32_t lane_count = kQRegSizeInBits / kSRegSizeInBits;
380 VIXL_ASSERT(lane < lane_count);
381 VIXL_ASSERT(GetCode() * lane_count < kNumberOfSRegister
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/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc953 int lane_count = LaneCountFromFormat(vform); in pmull2() local
954 for (int i = 0; i < lane_count; i++) { in pmull2()
956 PolynomialMult(src1.Uint(vform_src, lane_count + i), in pmull2()
957 src2.Uint(vform_src, lane_count + i))); in pmull2()
1935 int lane_count = LaneCountFromFormat(vform); in addlp() local
1936 for (int i = 0; i < lane_count; i++) { in addlp()
1946 for (int i = 0; i < lane_count; ++i) { in addlp()
2087 int lane_count = LaneCountFromFormat(vform); in uxtl2() local
2090 for (int i = 0; i < lane_count; i++) { in uxtl2()
2091 dst.SetUint(vform, i, src.Uint(vform_half, lane_count in uxtl2()
2099 int lane_count = LaneCountFromFormat(vform); sxtl2() local
3813 int lane_count = LaneCountFromFormat(vform); fcvtl2() local
3845 int lane_count = LaneCountFromFormat(vform) / 2; fcvtn2() local
3872 int lane_count = LaneCountFromFormat(vform) / 2; fcvtxn2() local
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H A Dsimulator-arm64.cc1444 // The `lane_count` and `lslane` arguments can be used to limit the lanes that
1452 int lane_count, int rightmost_lane) {
1456 unsigned msb = (lane_count + rightmost_lane) * lane_size_in_bytes;
1459 // For scalar types ((lane_count == 1) && (rightmost_lane == 0)), a register
1465 if ((lane_count == 1) && (rightmost_lane == 0)) {
1480 int leftmost_lane = rightmost_lane + lane_count - 1;
1572 int lane_count = 1 << (reg_size_log2 - lane_size_log2);
1584 PrintVRegisterFPHelper(code, lane_size, lane_count);
1660 int lane_count = GetPrintRegLaneCount(format);
1665 PrintVRegisterFPHelper(reg_code, lane_size, lane_count, lan
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H A Dsimulator-arm64.h1388 int lane_count = 1, int rightmost_lane = 0);
/third_party/vixl/test/aarch64/
H A Dtest-assembler-sve-aarch64.cc5651 int lane_count = core.GetSVELaneCount(kBRegSize);
5652 for (int i = 0; i < lane_count; i++) {
5654 core.zreg_lane(z5.GetCode(), kBRegSize, lane_count - i - 1);
5659 lane_count = core.GetSVELaneCount(kHRegSize);
5660 for (int i = 0; i < lane_count; i++) {
5662 core.zreg_lane(z6.GetCode(), kHRegSize, lane_count - i - 1);
5667 lane_count = core.GetSVELaneCount(kSRegSize);
5668 for (int i = 0; i < lane_count; i++) {
5670 core.zreg_lane(z7.GetCode(), kSRegSize, lane_count - i - 1);
5675 lane_count
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/third_party/node/deps/v8/src/compiler/
H A Dmachine-operator.cc1954 #define EXTRACT_LANE_OP(Type, Sign, lane_count) \
1957 DCHECK(0 <= lane_index && lane_index < lane_count); \
1972 #define REPLACE_LANE_OP(Type, lane_count) \
1975 DCHECK(0 <= lane_index && lane_index < lane_count); \

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