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Searched refs:lane2 (Results 1 - 5 of 5) sorted by relevance

/third_party/vixl/test/aarch64/
H A Dtest-assembler-sve-aarch64.cc7713 uint8_t lane2 = 3 - (3 * i);
7716 MemoryWrite(middle, 0, (i * reg_count) + 2, lane2);
7725 uint16_t lane2 = -4 + (5 * i);
7728 MemoryWrite(middle, offset, (i * reg_count) + 2, lane2);
7737 uint32_t lane2 = 5 - (7 * i);
7740 MemoryWrite(middle, offset, (i * reg_count) + 2, lane2);
7749 uint64_t lane2 = -9 + (3 * i);
7752 MemoryWrite(middle, offset, (i * reg_count) + 2, lane2);
7925 uint8_t lane2 = -6 + (11 * i);
7928 MemoryWrite(middle, offset, (i * reg_count) + 2, lane2);
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/third_party/mesa3d/src/amd/llvm/
H A Dac_llvm_build.h532 unsigned lane1, unsigned lane2, unsigned lane3);
H A Dac_llvm_build.c3269 static inline enum dpp_ctrl dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, in dpp_quad_perm() argument
3272 assert(lane0 < 4 && lane1 < 4 && lane2 < 4 && lane3 < 4); in dpp_quad_perm()
3273 return _dpp_quad_perm | lane0 | (lane1 << 2) | (lane2 << 4) | (lane3 << 6); in dpp_quad_perm()
4163 unsigned lane1, unsigned lane2, unsigned lane3) in ac_build_quad_swizzle()
4165 unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3); in ac_build_quad_swizzle()
4162 ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3) ac_build_quad_swizzle() argument
/third_party/mesa3d/src/panfrost/bifrost/
H A Dbifrost_compile.c2684 bi_index lane1, lane2; in bi_emit_alu() local
2695 lane2 = bi_iadd_u32(b, lane1, in bi_emit_alu()
2702 lane2 = bi_imm_u32(axis); in bi_emit_alu()
2712 right = bi_clper_old_i32(b, s0, lane2); in bi_emit_alu()
2718 right = bi_clper_i32(b, s0, lane2, in bi_emit_alu()
/third_party/node/deps/simdutf/
H A Dsimdutf.cpp18651 const __m512i lane2 = broadcast_epi128<2>(utf8);
18653 __m512i vec1 = expand_and_identify(lane1, lane2, valid_count1);
18667 __m512i vec2 = expand_and_identify(lane2, lane3, valid_count2);
18700 const __m512i lane2 = broadcast_epi128<2>(utf8);
18702 __m512i vec1 = expand_and_identify(lane1, lane2, valid_count1);
18716 SIMDUTF_ICELAKE_TRANSCODE16(lane2, lane3, true)
18947 const __m512i lane2 = broadcast_epi128<2>(utf8);
18949 __m512i vec1 = expand_and_identify(lane1, lane2, valid_count1);
18963 __m512i vec2 = expand_and_identify(lane2, lane3, valid_count2);
18997 const __m512i lane2
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