Searched refs:lane0 (Results 1 - 5 of 5) sorted by relevance
| /third_party/node/deps/v8/src/wasm/ |
| H A D | simd-shuffle.h | 41 uint8_t lane0[kBytesPerLane]; in TryMatchSplat() local
42 lane0[0] = shuffle[0]; in TryMatchSplat()
43 if (lane0[0] % kBytesPerLane != 0) return false; in TryMatchSplat()
45 lane0[i] = shuffle[i]; in TryMatchSplat()
46 if (lane0[i] != lane0[0] + i) return false; in TryMatchSplat()
48 // Now check that the other lanes are identical to lane0. in TryMatchSplat()
51 if (lane0[j] != shuffle[i * kBytesPerLane + j]) return false; in TryMatchSplat()
54 *index = lane0[0] / kBytesPerLane; in TryMatchSplat()
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| /third_party/vixl/test/aarch64/ |
| H A D | test-assembler-sve-aarch64.cc | 7344 uint8_t lane0 = 1 - (3 * i);
7346 MemoryWrite(middle, 0, (i * reg_count) + 0, lane0);
7354 uint16_t lane0 = -2 + (5 * i);
7356 MemoryWrite(middle, offset, (i * reg_count) + 0, lane0);
7364 uint32_t lane0 = 3 - (7 * i);
7366 MemoryWrite(middle, offset, (i * reg_count) + 0, lane0);
7374 uint64_t lane0 = -7 + (3 * i);
7376 MemoryWrite(middle, offset, (i * reg_count) + 0, lane0);
7515 uint8_t lane0 = -4 + (11 * i);
7517 MemoryWrite(middle, 0, (i * reg_count) + 0, lane0);
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| /third_party/mesa3d/src/amd/llvm/ |
| H A D | ac_llvm_build.h | 531 LLVMValueRef ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned lane0,
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| H A D | ac_llvm_build.c | 3269 static inline enum dpp_ctrl dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, in dpp_quad_perm() argument
3272 assert(lane0 < 4 && lane1 < 4 && lane2 < 4 && lane3 < 4); in dpp_quad_perm()
3273 return _dpp_quad_perm | lane0 | (lane1 << 2) | (lane2 << 4) | (lane3 << 6); in dpp_quad_perm()
4162 LLVMValueRef ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned lane0, in ac_build_quad_swizzle() argument
4165 unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3); in ac_build_quad_swizzle()
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| /third_party/node/deps/simdutf/ |
| H A D | simdutf.cpp | 18424 simdutf_really_inline __m512i expand_and_identify(__m512i lane0, __m512i lane1, int &count) {
18425 const __m512i merged = _mm512_mask_mov_epi32(lane0, 0x1000, lane1);
18647 const __m512i lane0 = broadcast_epi128<0>(utf8);
18650 __m512i vec0 = expand_and_identify(lane0, lane1, valid_count0);
18696 const __m512i lane0 = broadcast_epi128<0>(utf8);
18699 __m512i vec0 = expand_and_identify(lane0, lane1, valid_count0);
18943 const __m512i lane0 = broadcast_epi128<0>(utf8);
18946 __m512i vec0 = expand_and_identify(lane0, lane1, valid_count0);
18993 const __m512i lane0 = broadcast_epi128<0>(utf8);
18996 __m512i vec0 = expand_and_identify(lane0, lane
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