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Searched refs:kFormatVnD (Results 1 - 7 of 7) sorted by relevance

/third_party/vixl/src/aarch64/
H A Dinstructions-aarch64.cc319 ((movprfx_vform == kFormatVnD) && pg_matches_low8)) && in CanTakeSVEMovprfx()
564 case kFormatVnD: in GetSVEMulZmAndIndex()
596 case kFormatVnD: in GetSVEMulLongZmAndIndex()
1024 case kFormatVnD: in VectorFormatHalfWidth()
1052 return kFormatVnD; in VectorFormatDoubleWidth()
1102 case kFormatVnD: in VectorFormatHalfWidthDoubleLanes()
1164 case kFormatVnD: in IsSVEFormat()
1183 return kFormatVnD; in SVEFormatFromLaneSizeInBytes()
1284 case kFormatVnD: in LaneSizeInBitsFromFormat()
1324 case kFormatVnD in LaneSizeInBytesLog2FromFormat()
[all...]
H A Dsimulator-aarch64.cc1240 case kFormatVnD: in Simulator()
2419 fcvt(kFormatVnS, kFormatVnD, result, pg, zn); in Simulator()
2434 mov_merging(kFormatVnD, zd, pg, result); in Simulator()
2450 fcvt(kFormatVnD, kFormatVnS, zd, pg, result); in Simulator()
2514 if ((vform == kFormatVnS) || (vform == kFormatVnD)) { in Simulator()
2542 SVEBitwiseLogicalUnpredicatedHelper(EOR, kFormatVnD, result, zn, result); in Simulator()
2547 SVEBitwiseLogicalUnpredicatedHelper(EOR, kFormatVnD, result, zn, result); in Simulator()
2990 vform = kFormatVnD; in Simulator()
3025 sqdmlal(kFormatVnD, zda, zn_b, zm_idx); in Simulator()
3028 sqdmlal(kFormatVnD, zd in Simulator()
[all...]
H A Dinstructions-aarch64.h216 kFormatVnD = SVE_D | kFormatSVE, enumerator
335 return kFormatVnD; in GetSVEVectorFormat()
H A Dlogic-aarch64.cc653 VIXL_ASSERT((vform == kFormatVnS) || (vform == kFormatVnD)); in sdiv()
658 int64_t min_int = (vform == kFormatVnD) ? kXMinInt : kWMinInt; in sdiv()
675 VIXL_ASSERT((vform == kFormatVnS) || (vform == kFormatVnD)); in udiv()
2906 d[i] = src.Uint(kFormatVnD, (src_index * count) + i);
2910 dst.SetUint(kFormatVnD, i, d[i % count]);
4186 if (vform == kFormatVnD) {
6510 case kFormatVnD:
7020 op2 = is_wide_elements ? src2.Int(kFormatVnD, d_lane)
7028 op2 = is_wide_elements ? src2.Uint(kFormatVnD, d_lane)
7085 VectorFormat shift_vform = is_wide_elements ? kFormatVnD
[all...]
H A Ddisasm-aarch64.cc5598 if ((vform == kFormatVnS) || (vform == kFormatVnD)) { in Disassembler()
5700 if ((vform == kFormatVnS) || (vform == kFormatVnD)) { in Disassembler()
/third_party/vixl/test/aarch64/
H A Dtest-api-aarch64.cc299 VIXL_CHECK(ZRegister(3, kFormatVnD).Is(z3.VnD())); in TEST()
314 VIXL_CHECK(PRegisterWithLaneSize(3, kFormatVnD).Is(p3.VnD())); in TEST()
1555 temps.Include(ZRegister(3, kFormatVnD)); in TEST()
1587 temps.Exclude(ZRegister(3, kFormatVnD)); in TEST()
1619 temps.Release(ZRegister(3, kFormatVnD)); in TEST()
1639 temps.Include(PRegisterWithLaneSize(2, kFormatVnD)); in TEST()
1671 temps.Exclude(PRegisterWithLaneSize(2, kFormatVnD)); in TEST()
1703 temps.Release(PRegisterWithLaneSize(2, kFormatVnD)); in TEST()
H A Dtest-trace-aarch64.cc3074 reg.SetUint(kFormatVnD, lane, base | mantissas);

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