| /third_party/mesa3d/src/panfrost/shared/ |
| H A D | pan_tiling.c | 174 bool is_store) \
185 if (is_store) \
200 #define TILED_UNALIGNED_TYPE(pixel_t, is_store, tile_shift) { \
213 pixel_t *outp = (pixel_t *) (is_store ? dest : source); \
214 pixel_t *inp = (pixel_t *) (is_store ? source : dest); \
284 bool is_store) in panfrost_access_tiled_image()
300 dst_stride, src_stride, desc, is_store); in panfrost_access_tiled_image()
319 dst_stride, src_stride, desc, is_store); in panfrost_access_tiled_image()
334 dst_stride, src_stride, desc, is_store); in panfrost_access_tiled_image()
345 dst_stride, src_stride, desc, is_store); in panfrost_access_tiled_image()
278 panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y, unsigned w, unsigned h, uint32_t dst_stride, uint32_t src_stride, enum pipe_format format, bool is_store) panfrost_access_tiled_image() argument
[all...] |
| /third_party/node/deps/v8/src/wasm/ |
| H A D | memory-tracing.h | 25 uint8_t is_store; // 0 or 1 member
32 MemoryTracingInfo(uintptr_t offset, bool is_store, MachineRepresentation rep) in MemoryTracingInfo()
34 is_store(is_store), in MemoryTracingInfo()
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| H A D | memory-tracing.cc | 54 position, info->is_store ? " store to" : "load from", info->offset, in TraceMemoryOperation()
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| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_lower_ssbo.c | 106 bool is_store = op == nir_intrinsic_store_global; in lower_ssbo_instr() local
107 bool is_atomic = !is_store && op != nir_intrinsic_load_global; in lower_ssbo_instr()
114 nir_src index = intr->src[is_store ? 1 : 0]; in lower_ssbo_instr()
129 global->src[is_store ? 1 : 0] = nir_src_for_ssa(address); in lower_ssbo_instr()
136 if (is_store) { in lower_ssbo_instr()
152 return is_store ? NULL : &global->dest.ssa; in lower_ssbo_instr()
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| H A D | nir_opt_load_store_vectorize.c | 199 bool is_store; member
284 unsigned size = entry->is_store ? in get_bit_size()
588 entry->is_store = entry->info->value_src >= 0; in create_entry()
681 if (low->is_store) { in new_bitsize_acceptable()
1015 if (first->is_store) { in check_for_aliasing()
1032 if (prev->is_store && may_alias(ctx->shader, second, prev)) in check_for_aliasing()
1188 if (first->is_store) in try_vectorize()
1229 if (first->is_store) { in try_vectorize_shared2()
1240 b.cursor = nir_after_instr(first->is_store ? second->instr : first->instr); in try_vectorize_shared2()
1242 nir_ssa_def *offset = first->intrin->src[first->is_store] in try_vectorize_shared2()
[all...] |
| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_nir_lower_shading_rate_output.c | 69 bool is_store = op == nir_intrinsic_store_output || in lower_shading_rate_output_instr()
72 b->cursor = is_store ? nir_before_instr(instr) : nir_after_instr(instr); in lower_shading_rate_output_instr()
74 if (is_store) { in lower_shading_rate_output_instr()
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| H A D | brw_fs_nir.cpp | 4140 const bool is_store =
4143 const unsigned src = is_store ? 1 : 0;
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| /third_party/mesa3d/src/asahi/lib/ |
| H A D | tiling.c | 89 #define TILED_UNALIGNED_TYPE(pixel_t, is_store, tile_shift) { \
114 pixel_t *outp = (pixel_t *) (is_store ? ptiled : plinear); \
115 pixel_t *inp = (pixel_t *) (is_store ? plinear : ptiled); \
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| /third_party/mesa3d/src/panfrost/util/ |
| H A D | pan_lower_framebuffer.c | 90 pan_is_format_native(const struct util_format_description *desc, bool broken_ld_special, bool is_store) in pan_is_format_native() argument
92 if (is_store || broken_ld_special) in pan_is_format_native()
571 bool is_store = intr->intrinsic == nir_intrinsic_store_deref; in pan_lower_framebuffer() local
573 if (!(is_load || (is_store && is_blend))) in pan_lower_framebuffer()
594 if (pan_is_format_native(desc, broken_ld_special, is_store)) in pan_lower_framebuffer()
607 if (is_store) { in pan_lower_framebuffer()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| H A D | v3d_nir_lower_scratch.c | 40 bool is_store = instr->intrinsic == nir_intrinsic_store_scratch; in v3d_nir_scratch_offset() local
41 nir_ssa_def *offset = nir_ssa_for_src(b, instr->src[is_store ? 1 : 0], 1); in v3d_nir_scratch_offset()
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| H A D | nir_to_vir.c | 519 bool is_store = (instr->intrinsic == nir_intrinsic_store_ssbo || in ntq_emit_tmu_general() local
549 } else if (is_store) { in ntq_emit_tmu_general()
598 nir_src_as_uint(instr->src[is_store ? in ntq_emit_tmu_general()
614 uint32_t writemask = is_store ? nir_intrinsic_write_mask(instr) : 0; in ntq_emit_tmu_general()
621 if (is_store) { in ntq_emit_tmu_general()
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| /third_party/mesa3d/src/freedreno/afuc/ |
| H A D | disasm.c | 546 bool is_store = true; in disasm_instr() local
553 is_store = false; in disasm_instr()
562 is_store = false; in disasm_instr()
574 is_store = false; in disasm_instr()
583 if (is_store) in disasm_instr()
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| /third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_info.h | 77 unsigned is_store:1; member
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| H A D | tgsi_scan.c | 305 if (tgsi_get_opcode_info(fullinst->Instruction.Opcode)->is_store) { in scan_src_operand()
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| /third_party/mesa3d/src/panfrost/midgard/ |
| H A D | compiler.h | 565 bool is_store, in v_load_store_scratch()
578 .op = is_store ? midgard_op_st_128 : midgard_op_ld_128, in v_load_store_scratch()
594 if (is_store) { in v_load_store_scratch()
562 v_load_store_scratch( unsigned srcdest, unsigned index, bool is_store, unsigned mask) v_load_store_scratch() argument
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| H A D | midgard_compile.c | 1490 bool is_store = instr->intrinsic == nir_intrinsic_image_store; in emit_image_op() local
1507 if (is_store) { /* emit st_image_* */ in emit_image_op()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_compute_blit.c | 32 unsigned num_samples, bool is_store, bool has_dcc) in si_can_use_compute_blit()
35 if (format == PIPE_FORMAT_A8R8_UNORM && is_store) in si_can_use_compute_blit()
45 if (has_dcc && is_store && sctx->gfx_level < GFX10) in si_can_use_compute_blit()
31 si_can_use_compute_blit(struct si_context *sctx, enum pipe_format format, unsigned num_samples, bool is_store, bool has_dcc) si_can_use_compute_blit() argument
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| /third_party/mesa3d/src/gallium/drivers/virgl/ |
| H A D | virgl_tgsi.c | 393 !tgsi_get_opcode_info(inst->Instruction.Opcode)->is_store && in virgl_tgsi_transform_instruction()
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| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| H A D | nir_to_tgsi.c | 1875 bool is_store = (instr->intrinsic == nir_intrinsic_store_ssbo || in ntt_emit_mem() local
1890 instr->src[is_store ? 1 : 0], 2); in ntt_emit_mem()
1918 if (is_store) { in ntt_emit_mem()
2020 if (is_store) { in ntt_emit_mem()
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| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3.c | 1025 if (is_store(instr) && (instr->opc != OPC_STG) && (n == 1)) in ir3_valid_flags()
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| H A D | ir3.h | 990 is_store(struct ir3_instruction *instr) in is_store() function
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| /third_party/node/deps/v8/src/compiler/ |
| H A D | wasm-compiler.h | 389 void TraceMemoryOperation(bool is_store, MachineRepresentation, Node* index,
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| H A D | wasm-compiler.cc | 3941 void WasmGraphBuilder::TraceMemoryOperation(bool is_store, in TraceMemoryOperation() argument
3954 // Store effective_offset, is_store, and mem_rep. in TraceMemoryOperation()
3957 store(offsetof(wasm::MemoryTracingInfo, is_store), in TraceMemoryOperation()
3958 MachineRepresentation::kWord8, Int32Constant(is_store ? 1 : 0)); in TraceMemoryOperation()
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| /third_party/node/deps/v8/src/wasm/baseline/ |
| H A D | liftoff-compiler.cc | 2903 void TraceMemoryOperation(bool is_store, MachineRepresentation rep,
2940 __ LoadConstant(data, WasmValue(is_store ? 1 : 0));
2941 __ Store(info.gp(), no_reg, offsetof(MemoryTracingInfo, is_store), data,
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| /third_party/mesa3d/src/amd/llvm/ |
| H A D | ac_nir_to_llvm.c | 2157 bool is_store = instr->intrinsic == nir_intrinsic_store_global || in get_global_address() local
2159 LLVMValueRef addr = get_src(ctx, instr->src[is_store ? 1 : 0]); in get_global_address()
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