Searched refs:index_and_offset_are_uniform (Results 1 - 3 of 3) sorted by relevance
/third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_nir.h | 114 bool index_and_offset_are_uniform, 118 bool index_and_offset_are_uniform,
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H A D | lp_bld_nir.c | 1540 bool index_and_offset_are_uniform = nir_src_is_always_uniform(instr->src[0]) && nir_src_is_always_uniform(instr->src[1]); in visit_load_ssbo() local 1542 index_and_offset_are_uniform, idx, offset, result); in visit_load_ssbo() 1553 bool index_and_offset_are_uniform = nir_src_is_always_uniform(instr->src[1]) && nir_src_is_always_uniform(instr->src[2]); in visit_store_ssbo() local 1557 bld_base->store_mem(bld_base, writemask, nc, bitsize, index_and_offset_are_uniform, idx, offset, val); in visit_store_ssbo()
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H A D | lp_bld_nir_soa.c | 1196 bool index_and_offset_are_uniform, in emit_load_mem() 1215 if (index_and_offset_are_uniform && invocation_0_must_be_active(bld_base)) { in emit_load_mem() 1306 bool index_and_offset_are_uniform, in emit_store_mem() 1324 if (index_and_offset_are_uniform && invocation_0_must_be_active(bld_base)) { in emit_store_mem() 1193 emit_load_mem(struct lp_build_nir_context *bld_base, unsigned nc, unsigned bit_size, bool index_and_offset_are_uniform, LLVMValueRef index, LLVMValueRef offset, LLVMValueRef outval[NIR_MAX_VEC_COMPONENTS]) emit_load_mem() argument 1302 emit_store_mem(struct lp_build_nir_context *bld_base, unsigned writemask, unsigned nc, unsigned bit_size, bool index_and_offset_are_uniform, LLVMValueRef index, LLVMValueRef offset, LLVMValueRef dst) emit_store_mem() argument
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