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Searched refs:imm1 (Results 1 - 13 of 13) sorted by relevance

/third_party/mesa3d/src/panfrost/bifrost/valhall/test/
H A Dtest-validate-fau.cpp49 imm1 = bi_fau((enum bir_fau) (BIR_FAU_IMMEDIATE | 1), false); in ValidateFau()
64 bi_index zero, imm1, imm2, unif, unif_hi, unif2, core_id, lane_id; member in ValidateFau
88 VALID(bi_fma_f32_to(b, bi_register(1), zero, imm1, imm1)); in TEST_F()
90 INVALID(bi_fma_f32_to(b, bi_register(1), zero, imm1, imm2)); in TEST_F()
/third_party/mesa3d/src/compiler/glsl/
H A Dlower_blend_equation_advanced.cpp36 #define imm1(x) new(mem_ctx) ir_constant((float) (x), 1) macro
229 f->emit(if_tree(less(mincol, imm1(0)), in set_lum()
232 if_tree(greater(maxcol, imm1(1)), in set_lum()
263 f->emit(if_tree(greater(sbase, imm1(0)), in set_lum_sat()
311 f.emit(if_tree(equal(dst_alpha, imm1(0)), in calc_blend_result()
319 f.emit(if_tree(equal(src_alpha, imm1(0)), in calc_blend_result()
405 f.emit(assign(p1, mul(src_alpha, sub(imm1(1), dst_alpha)))); in calc_blend_result()
406 f.emit(assign(p2, mul(dst_alpha, sub(imm1(1), src_alpha)))); in calc_blend_result()
/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_peephole.cpp555 ImmediateValue &imm0, ImmediateValue &imm1) in expr()
557 struct Storage *const a = &imm0.reg, *const b = &imm1.reg; in expr()
790 ImmediateValue &imm1, in expr()
793 struct Storage *const a = &imm0.reg, *const b = &imm1.reg, *const c = &imm2.reg; in expr()
914 ImmediateValue imm1; in tryCollapseChainedMULs() local
925 if (mul1->src(s1 = 0).getImmediate(imm1) || in tryCollapseChainedMULs()
926 mul1->src(s1 = 1).getImmediate(imm1)) { in tryCollapseChainedMULs()
928 // a = mul r, imm1 in tryCollapseChainedMULs()
929 // d = mul a, imm2 -> d = mul r, (imm1 * imm2) in tryCollapseChainedMULs()
930 mul1->setSrc(s1, bld.loadImm(NULL, f * imm1 in tryCollapseChainedMULs()
554 expr(Instruction *i, ImmediateValue &imm0, ImmediateValue &imm1) expr() argument
788 expr(Instruction *i, ImmediateValue &imm0, ImmediateValue &imm1, ImmediateValue &imm2) expr() argument
1400 ImmediateValue imm1; opnd() local
1475 ImmediateValue imm1; opnd() local
[all...]
/third_party/node/deps/v8/src/wasm/
H A Dwasm-module-builder.h187 void EmitWithU8U8(WasmOpcode opcode, const byte imm1, const byte imm2);
H A Dwasm-module-builder.cc113 void WasmFunctionBuilder::EmitWithU8U8(WasmOpcode opcode, const byte imm1, in EmitWithU8U8() argument
116 body_.write_u8(imm1); in EmitWithU8U8()
/third_party/vixl/test/aarch64/
H A Dtest-simulator-aarch64.cc217 const VRegister& vd, int imm1, const VRegister& vn, int imm2);
2787 for (unsigned imm1 = 0; imm1 < inputs_imm1_length; imm1++) { in TestOpImmOpImmNEON()
2796 (imm1 * inputs_imm2_length * vd_lane_count) + in TestOpImmOpImmNEON()
2823 (imm1 * inputs_imm2_length * vd_lane_count) + in TestOpImmOpImmNEON()
2828 unsigned input_index_imm1 = imm1; in TestOpImmOpImmNEON()
/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeARM_32.c1662 sljit_uw imm1; in generate_int() local
1705 imm1 = SRC2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8); in generate_int()
1709 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); in generate_int()
1744 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); in generate_int()
1764 FAIL_IF(push_inst(compiler, (positive ? MOV : MVN) | RD(reg) | imm1)); in generate_int()
/third_party/node/deps/v8/src/compiler/backend/arm/
H A Dcode-generator-arm.cc2844 uint64_t imm1 = make_uint64(i.InputUint32(1), i.InputUint32(0)); in AssembleArchInstruction()
2846 __ vmov(dst.low(), base::Double(imm1)); in AssembleArchInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp237 unsigned Op0, bool Op0IsKill, uint64_t imm1, in fastEmitInst_riir()
236 fastEmitInst_riir(uint64_t inst, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t imm1, uint64_t imm2, unsigned Op3, bool Op3IsKill) fastEmitInst_riir() argument
/third_party/node/deps/v8/src/compiler/backend/mips64/
H A Dcode-generator-mips64.cc2045 uint64_t imm1 = make_uint64(i.InputUint32(1), i.InputUint32(0)); in AssembleArchInstruction() local
2047 __ li(kScratchReg, imm1); in AssembleArchInstruction()
/third_party/node/deps/v8/src/compiler/backend/riscv64/
H A Dcode-generator-riscv64.cc2757 int64_t imm1 = make_uint64(i.InputInt32(3), i.InputInt32(2)); in AssembleArchInstruction() local
2763 __ li(kScratchReg, imm1); in AssembleArchInstruction()
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dmacro-assembler-riscv64.cc3978 uint64_t imm1 = *(reinterpret_cast<const uint64_t*>(imms)); in WasmRvvS128const() local
3983 li(kScratchReg, imm1); in WasmRvvS128const()
/third_party/node/deps/v8/src/wasm/baseline/riscv64/
H A Dliftoff-assembler-riscv64.h1885 uint64_t imm1 = *(reinterpret_cast<const uint64_t*>(shuffle)); in emit_i8x16_shuffle() local
1891 li(kScratchReg, imm1); in emit_i8x16_shuffle()

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