| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-fp-aarch64.cc | 162 COMPARE(fminnm(h22, h23, h24), "fminnm h22, h23, h24"); in TEST()
163 COMPARE(fminnm(s5, s6, s7), "fminnm s5, s6, s7"); in TEST()
164 COMPARE(fminnm(d8, d9, d10), "fminnm d8, d9, d10"); in TEST()
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| H A D | test-cpu-features-aarch64.cc | 611 TEST_FP(fminnm_0, fminnm(d0, d1, d2))
612 TEST_FP(fminnm_1, fminnm(s0, s1, s2))
3270 TEST_FP_NEON(fminnm_0, fminnm(v0.V2S(), v1.V2S(), v2.V2S()))
3271 TEST_FP_NEON(fminnm_1, fminnm(v0.V4S(), v1.V4S(), v2.V4S()))
3272 TEST_FP_NEON(fminnm_2, fminnm(v0.V2D(), v1.V2D(), v2.V2D()))
3485 TEST_FP_FPHALF(fminnm_0, fminnm(h0, h1, h2))
3670 TEST_FP_NEON_NEONHALF(fminnm_0, fminnm(v0.V4H(), v1.V4H(), v2.V4H()))
3671 TEST_FP_NEON_NEONHALF(fminnm_1, fminnm(v0.V8H(), v1.V8H(), v2.V8H()))
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| H A D | test-api-movprfx-aarch64.cc | 445 __ fminnm(z24.VnS(), p6.Merging(), z24.VnS(), z24.VnS()); in TEST()
967 __ fminnm(z6.VnH(), p0.Merging(), z6.VnH(), 0.0); in TEST()
970 __ fminnm(z1.VnS(), p1.Merging(), z1.VnS(), z14.VnS()); in TEST()
1814 __ fminnm(z30.VnH(), p7.Merging(), z30.VnH(), 0.0); in TEST()
1817 __ fminnm(z31.VnD(), p5.Merging(), z31.VnD(), z25.VnD()); in TEST()
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| H A D | test-trace-aarch64.cc | 540 __ fminnm(d19, d14, d30); in GenerateTestSequenceFP()
541 __ fminnm(s0, s1, s1); in GenerateTestSequenceFP()
2644 __ fminnm(v21.V2D(), v6.V2D(), v5.V2D()); in GenerateTestSequenceNEONFP()
2645 __ fminnm(v22.V2S(), v18.V2S(), v14.V2S()); in GenerateTestSequenceNEONFP()
2646 __ fminnm(v25.V4S(), v31.V4S(), v3.V4S()); in GenerateTestSequenceNEONFP()
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| H A D | test-simulator-aarch64.cc | 2913 DEFINE_TEST_FP_FP16(fminnm, 2Op, Basic)
4630 DEFINE_TEST_NEON_3SAME_FP(fminnm, Basic)
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| H A D | test-disasm-sve-aarch64.cc | 953 COMPARE(fminnm(z19.VnH(), p2.Merging(), z19.VnH(), z29.VnH()), in TEST()
954 "fminnm z19.h, p2/m, z19.h, z29.h"); in TEST()
955 COMPARE(fminnm(z19.VnS(), p2.Merging(), z19.VnS(), z29.VnS()), in TEST()
956 "fminnm z19.s, p2/m, z19.s, z29.s"); in TEST()
957 COMPARE(fminnm(z19.VnD(), p2.Merging(), z19.VnD(), z29.VnD()), in TEST()
958 "fminnm z19.d, p2/m, z19.d, z29.d"); in TEST()
1034 "fminnm z3.h, p3/m, z3.h, z5.h"); in TEST()
1071 COMPARE(fminnm(z26.VnH(), p0.Merging(), z26.VnH(), 1.0), in TEST()
1072 "fminnm z26.h, p0/m, z26.h, #1.0"); in TEST()
1073 COMPARE(fminnm(z2 in TEST()
[all...] |
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 2048 V(fminnm, FPMinNM, false)
2064 V(fminnmp, fminnm, FPMinNM)
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| H A D | simulator-arm64.cc | 3256 fminnm(vform, rd, rn, rm);
4236 fminnm(vf, rd, rn, rm);
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 643 fminnm(fd, fn, fm); in Fminnm()
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| H A D | assembler-arm64.h | 1655 void fminnm(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | assembler-arm64.cc | 3129 V(fminnm, NEON_FMINNM, FMINNM) \
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 4481 V(fminnm, FPMinNM, false)
4501 V(fminnmp, fminnm, FPMinNM)
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| H A D | assembler-aarch64.h | 2300 void fminnm(const VRegister& vd, const VRegister& fn, const VRegister& vm);
4323 void fminnm(const ZRegister& zd,
4329 void fminnm(const ZRegister& zd,
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| H A D | macro-assembler-sve-aarch64.cc | 820 &Assembler::fminnm), in Fminnm()
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| H A D | simulator-aarch64.cc | 6539 fminnm(vform, rd, rn, rm); in Simulator()
7390 fminnm(vf, rd, rn, rm); in Simulator()
7621 SIM_FUNC(FMINNM, fminnm); in Simulator()
10216 fminnm(vform, result, zdn, zm); in Simulator()
10274 fminnm(vform, result, zdn, min_max_imm); in Simulator()
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| H A D | assembler-sve-aarch64.cc | 765 void Assembler::fminnm(const ZRegister& zd, in fminnm() function in vixl::aarch64::Assembler
784 void Assembler::fminnm(const ZRegister& zd, in fminnm() function in vixl::aarch64::Assembler
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| H A D | macro-assembler-aarch64.h | 1646 fminnm(vd, vn, vm); in Fminnm()
4622 fminnm(zd, pg, zd, imm); in Fminnm()
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| H A D | assembler-aarch64.cc | 4252 V(fminnm, NEON_FMINNM, FMINNM, 0) \
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