Searched refs:fmaxv (Results 1 - 17 of 17) sorted by relevance
/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | assembler-arm64.h | 1203 void fmaxv(const VRegister& vd, const VRegister& vn);
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H A D | macro-assembler-arm64.h | 274 V(fmaxv, Fmaxv) \
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H A D | assembler-arm64.cc | 2042 V(fmaxv, NEON_FMAXV, vd.Is1S()) \
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/third_party/node/deps/v8/src/execution/arm64/ |
H A D | simulator-arm64.h | 2168 LogicVRegister fmaxv(VectorFormat vform, LogicVRegister dst,
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H A D | simulator-arm64.cc | 4616 fmaxv(vf, rd, rn);
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H A D | simulator-logic-arm64.cc | 3645 LogicVRegister Simulator::fmaxv(VectorFormat vform, LogicVRegister dst, in fmaxv() function in v8::internal::Simulator
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/third_party/vixl/src/aarch64/ |
H A D | assembler-aarch64.h | 3055 void fmaxv(const VRegister& vd, const VRegister& vn); 4308 void fmaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn);
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H A D | simulator-aarch64.cc | 7881 fmaxv(vf, rd, rn); in Simulator() 7901 fmaxv(vf, rd, rn); in Simulator() 10536 fn = &Simulator::fmaxv; in Simulator()
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H A D | simulator-aarch64.h | 4808 LogicVRegister fmaxv(VectorFormat vform,
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H A D | macro-assembler-aarch64.h | 3020 V(fmaxv, Fmaxv) \ 4600 fmaxv(vd, pg, zn); in Fmaxv()
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H A D | assembler-aarch64.cc | 5388 V(fmaxv, NEON_FMAXV, NEON_FMAXV_H) \
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H A D | assembler-sve-aarch64.cc | 1356 void Assembler::fmaxv(const VRegister& vd, in fmaxv() function in vixl::aarch64::Assembler
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H A D | logic-aarch64.cc | 5637 LogicVRegister Simulator::fmaxv(VectorFormat vform,
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/third_party/vixl/test/aarch64/ |
H A D | test-simulator-aarch64.cc | 4956 DEFINE_TEST_NEON_ACROSS_FP(fmaxv, Basic)
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H A D | test-disasm-sve-aarch64.cc | 1548 COMPARE(fmaxv(h3, p1, z23.VnH()), "fmaxv h3, p1, z23.h"); in TEST() 1549 COMPARE(fmaxv(s3, p1, z23.VnS()), "fmaxv s3, p1, z23.s"); in TEST() 1550 COMPARE(fmaxv(d3, p1, z23.VnD()), "fmaxv d3, p1, z23.d"); in TEST()
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H A D | test-trace-aarch64.cc | 2640 __ fmaxv(s31, v29.V4S()); in GenerateTestSequenceNEONFP()
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H A D | test-cpu-features-aarch64.cc | 3260 TEST_FP_NEON(fmaxv_0, fmaxv(s0, v1.V4S()))
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