| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-fp-aarch64.cc | 159 COMPARE(fmaxnm(h4, h5, h6), "fmaxnm h4, h5, h6"); in TEST()
160 COMPARE(fmaxnm(s31, s0, s1), "fmaxnm s31, s0, s1"); in TEST()
161 COMPARE(fmaxnm(d2, d3, d4), "fmaxnm d2, d3, d4"); in TEST()
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| H A D | test-cpu-features-aarch64.cc | 607 TEST_FP(fmaxnm_0, fmaxnm(d0, d1, d2))
608 TEST_FP(fmaxnm_1, fmaxnm(s0, s1, s2))
3252 TEST_FP_NEON(fmaxnm_0, fmaxnm(v0.V2S(), v1.V2S(), v2.V2S()))
3253 TEST_FP_NEON(fmaxnm_1, fmaxnm(v0.V4S(), v1.V4S(), v2.V4S()))
3254 TEST_FP_NEON(fmaxnm_2, fmaxnm(v0.V2D(), v1.V2D(), v2.V2D()))
3483 TEST_FP_FPHALF(fmaxnm_0, fmaxnm(h0, h1, h2))
3660 TEST_FP_NEON_NEONHALF(fmaxnm_0, fmaxnm(v0.V4H(), v1.V4H(), v2.V4H()))
3661 TEST_FP_NEON_NEONHALF(fmaxnm_1, fmaxnm(v0.V8H(), v1.V8H(), v2.V8H()))
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| H A D | test-api-movprfx-aarch64.cc | 439 __ fmaxnm(z15.VnD(), p2.Merging(), z15.VnD(), z15.VnD()); in TEST()
955 __ fmaxnm(z31.VnD(), p7.Merging(), z31.VnD(), 0.0); in TEST()
958 __ fmaxnm(z11.VnS(), p7.Merging(), z11.VnS(), z28.VnS()); in TEST()
1802 __ fmaxnm(z1.VnS(), p3.Merging(), z1.VnS(), 0.0); in TEST()
1805 __ fmaxnm(z10.VnD(), p1.Merging(), z10.VnD(), z17.VnD()); in TEST()
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| H A D | test-trace-aarch64.cc | 536 __ fmaxnm(d28, d4, d2); in GenerateTestSequenceFP()
537 __ fmaxnm(s6, s10, s8); in GenerateTestSequenceFP()
2626 __ fmaxnm(v16.V2D(), v8.V2D(), v20.V2D()); in GenerateTestSequenceNEONFP()
2627 __ fmaxnm(v15.V2S(), v26.V2S(), v25.V2S()); in GenerateTestSequenceNEONFP()
2628 __ fmaxnm(v23.V4S(), v14.V4S(), v16.V4S()); in GenerateTestSequenceNEONFP()
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| H A D | test-simulator-aarch64.cc | 2911 DEFINE_TEST_FP_FP16(fmaxnm, 2Op, Basic)
4621 DEFINE_TEST_NEON_3SAME_FP(fmaxnm, Basic)
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| H A D | test-disasm-sve-aarch64.cc | 947 COMPARE(fmaxnm(z15.VnH(), p4.Merging(), z15.VnH(), z3.VnH()), in TEST()
948 "fmaxnm z15.h, p4/m, z15.h, z3.h"); in TEST()
949 COMPARE(fmaxnm(z15.VnS(), p4.Merging(), z15.VnS(), z3.VnS()), in TEST()
950 "fmaxnm z15.s, p4/m, z15.s, z3.s"); in TEST()
951 COMPARE(fmaxnm(z15.VnD(), p4.Merging(), z15.VnD(), z3.VnD()), in TEST()
952 "fmaxnm z15.d, p4/m, z15.d, z3.d"); in TEST()
1041 "fmaxnm z4.s, p4/m, z4.s, z6.s"); in TEST()
1059 COMPARE(fmaxnm(z6.VnH(), p1.Merging(), z6.VnH(), 0.0), in TEST()
1060 "fmaxnm z6.h, p1/m, z6.h, #0.0"); in TEST()
1061 COMPARE(fmaxnm(z in TEST()
[all...] |
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 2047 V(fmaxnm, FPMaxNM, false) \
2062 V(fmaxnmp, fmaxnm, FPMaxNM) \
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| H A D | simulator-arm64.cc | 3252 fmaxnm(vform, rd, rn, rm);
4233 fmaxnm(vf, rd, rn, rm);
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 631 fmaxnm(fd, fn, fm); in Fmaxnm()
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| H A D | assembler-arm64.h | 1652 void fmaxnm(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | assembler-arm64.cc | 3127 V(fmaxnm, NEON_FMAXNM, FMAXNM) \
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 4480 V(fmaxnm, FPMaxNM, false) \
4499 V(fmaxnmp, fmaxnm, FPMaxNM) \
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| H A D | assembler-aarch64.h | 2297 void fmaxnm(const VRegister& vd, const VRegister& fn, const VRegister& vm);
4293 void fmaxnm(const ZRegister& zd,
4299 void fmaxnm(const ZRegister& zd,
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| H A D | macro-assembler-sve-aarch64.cc | 805 &Assembler::fmaxnm), in Fmaxnm()
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| H A D | simulator-aarch64.cc | 6534 fmaxnm(vform, rd, rn, rm); in Simulator()
7387 fmaxnm(vf, rd, rn, rm); in Simulator()
7616 SIM_FUNC(FMAXNM, fmaxnm); in Simulator()
10210 fmaxnm(vform, result, zdn, zm); in Simulator()
10268 fmaxnm(vform, result, zdn, min_max_imm); in Simulator()
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| H A D | assembler-sve-aarch64.cc | 693 void Assembler::fmaxnm(const ZRegister& zd, in fmaxnm() function in vixl::aarch64::Assembler
712 void Assembler::fmaxnm(const ZRegister& zd, in fmaxnm() function in vixl::aarch64::Assembler
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| H A D | macro-assembler-aarch64.h | 1636 fmaxnm(vd, vn, vm); in Fmaxnm()
4585 fmaxnm(zd, pg, zd, imm); in Fmaxnm()
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| H A D | assembler-aarch64.cc | 4251 V(fmaxnm, NEON_FMAXNM, FMAXNM, 0) \
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