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Help
Searched
refs:fmask_offset
(Results
1 - 14
of
14
) sorted by relevance
/third_party/mesa3d/src/amd/vulkan/
H
A
D
radv_meta_fmask_copy.c
232
assert(src_image->planes[0].surface.
fmask_offset
+ src_image->planes[0].surface.fmask_size ==
in radv_fixup_copy_dst_metadata()
234
dst_image->planes[0].surface.
fmask_offset
+ dst_image->planes[0].surface.fmask_size ==
in radv_fixup_copy_dst_metadata()
239
src_offset = src_image->bindings[0].offset + src_image->planes[0].surface.
fmask_offset
;
in radv_fixup_copy_dst_metadata()
240
dst_offset = dst_image->bindings[0].offset + dst_image->planes[0].surface.
fmask_offset
;
in radv_fixup_copy_dst_metadata()
H
A
D
radv_image.c
1066
va = gpu_address + image->bindings[0].offset + image->planes[0].surface.
fmask_offset
;
in gfx10_make_texture_descriptor()
1244
va = gpu_address + image->bindings[0].offset + image->planes[0].surface.
fmask_offset
;
in si_make_texture_descriptor()
H
A
D
radv_meta_clear.c
1283
uint64_t offset = image->bindings[0].offset + image->planes[0].surface.
fmask_offset
;
in radv_clear_fmask()
H
A
D
radv_private.h
2437
return image->planes[0].surface.
fmask_offset
;
H
A
D
radv_device.c
6360
surf->
fmask_offset
;
in radv_initialise_color_surface()
/third_party/mesa3d/src/gallium/winsys/radeon/drm/
H
A
D
radeon_drm_surface.c
444
surf_ws->
fmask_offset
= align64(surf_ws->total_size, 1 << surf_ws->fmask_alignment_log2);
in radeon_winsys_surface_init()
445
surf_ws->total_size = surf_ws->
fmask_offset
+ surf_ws->fmask_size;
in radeon_winsys_surface_init()
/third_party/mesa3d/src/amd/common/
H
A
D
ac_surface.c
2510
surf->meta_offset = surf->display_dcc_offset = surf->
fmask_offset
= surf->cmask_offset = 0;
in ac_compute_surface()
2514
surf->
fmask_offset
= align64(surf->total_size, 1 << surf->fmask_alignment_log2);
in ac_compute_surface()
2515
surf->total_size = surf->
fmask_offset
+ surf->fmask_size;
in ac_compute_surface()
2559
if (!surf->
fmask_offset
&& !surf->cmask_offset) {
in ac_surface_zero_dcc_fields()
2944
if (surf->
fmask_offset
)
in ac_surface_override_offset_stride()
2945
surf->
fmask_offset
+= offset;
in ac_surface_override_offset_stride()
3040
if (surf->
fmask_offset
)
in ac_surface_print_info()
3044
surf->
fmask_offset
, surf->fmask_size,
in ac_surface_print_info()
3090
if (surf->
fmask_offset
)
in ac_surface_print_info()
3095
surf->
fmask_offset
, sur
in ac_surface_print_info()
[all...]
H
A
D
ac_surface.h
380
uint64_t
fmask_offset
;
member
H
A
D
ac_surface_modifier_test.c
259
assert(surf.
fmask_offset
== 0);
in test_modifier()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H
A
D
si_state.c
2609
if (tex->surface.
fmask_offset
) {
in si_initialize_color_surface()
2871
if (tex->surface.
fmask_offset
) {
in si_update_fb_dirtiness_after_rendering()
3062
if (tex->surface.
fmask_offset
)
in si_set_framebuffer_state()
3264
if (tex->surface.
fmask_offset
) {
in si_emit_framebuffer_state()
3265
cb_color_fmask = (tex->buffer.gpu_address + tex->surface.
fmask_offset
) >> 8;
in si_emit_framebuffer_state()
3320
if (!tex->surface.
fmask_offset
)
in si_emit_framebuffer_state()
3367
if (!tex->surface.
fmask_offset
)
in si_emit_framebuffer_state()
3407
if (!tex->surface.
fmask_offset
)
in si_emit_framebuffer_state()
3422
if (tex->surface.
fmask_offset
) {
in si_emit_framebuffer_state()
4119
if (tex->surface.
fmask_offset
) {
in gfx10_make_texture_descriptor()
[all...]
H
A
D
si_texture.c
484
tex->surface.
fmask_offset
= new_tex->surface.
fmask_offset
;
in si_reallocate_texture_inplace()
H
A
D
si_compute_blit.c
942
si_clear_buffer(sctx, tex, stex->surface.
fmask_offset
, stex->surface.fmask_size,
in si_compute_expand_fmask()
H
A
D
si_blit.c
545
if (need_fmask_expand && tex->surface.
fmask_offset
&& !tex->fmask_is_identity) {
in si_blit_decompress_color()
H
A
D
si_descriptors.c
775
assert(fmask_desc || tex->surface.
fmask_offset
== 0);
in si_set_shader_image_desc()
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