| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 2115 fcadd(scratch, pg, scratch, zm, rot); in Fcadd()
2120 fcadd(zd, pg, zd, zm, rot); in Fcadd()
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| H A D | logic-aarch64.cc | 2572 LogicVRegister Simulator::fcadd(VectorFormat vform,
2608 LogicVRegister Simulator::fcadd(VectorFormat vform,
2614 fcadd<SimFloat16>(vform, dst, src1, src2, rot);
2616 fcadd<float>(vform, dst, src1, src2, rot);
2619 fcadd<double>(vform, dst, src1, src2, rot);
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| H A D | simulator-aarch64.h | 3701 LogicVRegister fcadd(VectorFormat vform,
3706 LogicVRegister fcadd(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3632 void fcadd(const VRegister& vd,
4144 void fcadd(const ZRegister& zd,
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| H A D | simulator-aarch64.cc | 7676 fcadd(vf, rd, rn, rm, rot); in Simulator()
10442 fcadd(vform, result, zdn, zm, rot); in Simulator()
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| H A D | assembler-aarch64.cc | 4500 void Assembler::fcadd(const VRegister& vd,
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| H A D | assembler-sve-aarch64.cc | 1267 void Assembler::fcadd(const ZRegister& zd, in fcadd() function in vixl::aarch64::Assembler
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| H A D | macro-assembler-aarch64.h | 3315 fcadd(vd, vn, vm, rot); in Fcadd()
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| /third_party/vixl/test/aarch64/ |
| H A D | test-cpu-features-aarch64.cc | 3534 TEST_FP_FCMA_NEON(fcadd_0, fcadd(v0.V2S(), v1.V2S(), v2.V2S(), 270))
3535 TEST_FP_FCMA_NEON(fcadd_1, fcadd(v0.V4S(), v1.V4S(), v2.V4S(), 90))
3536 TEST_FP_FCMA_NEON(fcadd_2, fcadd(v0.V2D(), v1.V2D(), v2.V2D(), 270))
3774 TEST_FP_FCMA_NEON_NEONHALF(fcadd_0, fcadd(v0.V4H(), v1.V4H(), v2.V4H(), 90))
3775 TEST_FP_FCMA_NEON_NEONHALF(fcadd_1, fcadd(v0.V8H(), v1.V8H(), v2.V8H(), 90))
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| H A D | test-disasm-sve-aarch64.cc | 1400 COMPARE(fcadd(z12.VnH(), p5.Merging(), z12.VnH(), z13.VnH(), 90), in TEST()
1401 "fcadd z12.h, p5/m, z12.h, z13.h, #90"); in TEST()
1402 COMPARE(fcadd(z12.VnS(), p5.Merging(), z12.VnS(), z13.VnS(), 90), in TEST()
1403 "fcadd z12.s, p5/m, z12.s, z13.s, #90"); in TEST()
1404 COMPARE(fcadd(z12.VnD(), p5.Merging(), z12.VnD(), z13.VnD(), 90), in TEST()
1405 "fcadd z12.d, p5/m, z12.d, z13.d, #90"); in TEST()
1406 COMPARE(fcadd(z22.VnH(), p0.Merging(), z22.VnH(), z23.VnH(), 270), in TEST()
1407 "fcadd z22.h, p0/m, z22.h, z23.h, #270"); in TEST()
1408 COMPARE(fcadd(z22.VnS(), p0.Merging(), z22.VnS(), z23.VnS(), 270), in TEST()
1409 "fcadd z2 in TEST()
[all...] |
| H A D | test-api-movprfx-aarch64.cc | 373 __ fcadd(z28.VnD(), p5.Merging(), z28.VnD(), z28.VnD(), 90); in TEST()
898 __ fcadd(z14.VnD(), p7.Merging(), z14.VnD(), z12.VnD(), 90); in TEST()
1739 __ fcadd(z10.VnH(), p2.Merging(), z10.VnH(), z20.VnH(), 90); in TEST()
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