Searched refs:fadda (Results 1 - 7 of 7) sorted by relevance
| /third_party/vixl/src/aarch64/ |
| H A D | logic-aarch64.cc | 2534 LogicVRegister Simulator::fadda(VectorFormat vform,
2551 LogicVRegister Simulator::fadda(VectorFormat vform,
2557 fadda<SimFloat16>(vform, acc, pg, src);
2560 fadda<float>(vform, acc, pg, src);
2563 fadda<double>(vform, acc, pg, src);
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| H A D | simulator-aarch64.h | 3732 LogicVRegister fadda(VectorFormat vform,
3736 LogicVRegister fadda(VectorFormat vform,
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| H A D | assembler-aarch64.h | 4135 void fadda(const VRegister& vd,
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| H A D | assembler-sve-aarch64.cc | 550 void Assembler::fadda(const VRegister& vd, in fadda() function in vixl::aarch64::Assembler
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| H A D | macro-assembler-aarch64.h | 4355 fadda(vd, pg, vn, zm); in Fadda()
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| H A D | simulator-aarch64.cc | 10179 fadda(vform, vdn, pg, zm); in Simulator()
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| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-sve-aarch64.cc | 873 COMPARE(fadda(h10, p2, h10, z0.VnH()), "fadda h10, p2, h10, z0.h"); in TEST()
874 COMPARE(fadda(s10, p2, s10, z0.VnS()), "fadda s10, p2, s10, z0.s"); in TEST()
875 COMPARE(fadda(d10, p2, d10, z0.VnD()), "fadda d10, p2, d10, z0.d"); in TEST()
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