| /third_party/mesa3d/src/intel/common/ |
| H A D | intel_gem.c | 61 enum drm_i915_gem_engine_class engine_class) in intel_gem_count_engines()
66 if (info->engines[i].engine.engine_class == engine_class) in intel_gem_count_engines()
109 uint16_t engine_class = engine_classes[i]; in intel_gem_create_context_engines() local
110 assert(engine_class == I915_ENGINE_CLASS_RENDER || in intel_gem_create_context_engines()
111 engine_class == I915_ENGINE_CLASS_COPY || in intel_gem_create_context_engines()
112 engine_class == I915_ENGINE_CLASS_COMPUTE); in intel_gem_create_context_engines()
113 if (i915_engine_counts[engine_class] <= 0) { in intel_gem_create_context_engines()
124 int *idx = &last_engine_idx[engine_class]; in intel_gem_create_context_engines()
127 if (info->engines[*idx].engine.engine_class in intel_gem_create_context_engines()
60 intel_gem_count_engines(const struct drm_i915_query_engine_info *info, enum drm_i915_gem_engine_class engine_class) intel_gem_count_engines() argument
[all...] |
| H A D | intel_gem.h | 169 enum drm_i915_gem_engine_class engine_class);
|
| /third_party/mesa3d/src/intel/tools/ |
| H A D | aub_write.c | 351 enum drm_i915_gem_engine_class engine_class; member
360 .engine_class = I915_ENGINE_CLASS_RENDER,
369 .engine_class = I915_ENGINE_CLASS_VIDEO,
378 .engine_class = I915_ENGINE_CLASS_COPY,
451 engine_from_engine_class(enum drm_i915_gem_engine_class engine_class) in engine_from_engine_class() argument
453 switch (engine_class) { in engine_from_engine_class()
457 return &engines[engine_class]; in engine_from_engine_class()
466 enum drm_i915_gem_engine_class engine_class, in get_context_init()
484 gfx8_contexts[engine_class](params, data, size); in get_context_init()
486 gfx10_contexts[engine_class](param in get_context_init()
464 get_context_init(const struct intel_device_info *devinfo, const struct intel_context_parameters *params, enum drm_i915_gem_engine_class engine_class, uint32_t *data, uint32_t *size) get_context_init() argument
502 write_hwsp(struct aub_file *aub, enum drm_i915_gem_engine_class engine_class) write_hwsp() argument
518 write_engine_execlist_setup(struct aub_file *aub, uint32_t ctx_id, struct aub_hw_context *hw_ctx, enum drm_i915_gem_engine_class engine_class) write_engine_execlist_setup() argument
652 aub_write_ensure_context(struct aub_file *aub, uint32_t ctx_id, enum drm_i915_gem_engine_class engine_class) aub_write_ensure_context() argument
773 aub_dump_ring_buffer_legacy(struct aub_file *aub, uint64_t batch_offset, uint64_t offset, enum drm_i915_gem_engine_class engine_class) aub_dump_ring_buffer_legacy() argument
812 aub_write_ensure_hwsp(struct aub_file *aub, enum drm_i915_gem_engine_class engine_class) aub_write_ensure_hwsp() argument
825 aub_write_exec(struct aub_file *aub, uint32_t ctx_id, uint64_t batch_addr, uint64_t offset, enum drm_i915_gem_engine_class engine_class) aub_write_exec() argument
845 aub_write_context_execlists(struct aub_file *aub, uint64_t context_addr, enum drm_i915_gem_engine_class engine_class) aub_write_context_execlists() argument
[all...] |
| H A D | error2aub.c | 160 enum drm_i915_gem_engine_class engine_class; member
169 enum drm_i915_gem_engine_class engine_class, in find_or_create()
175 bo_entry->engine_class == engine_class && in find_or_create()
183 new_bo->engine_class = engine_class; in find_or_create()
192 enum drm_i915_gem_engine_class *engine_class, in engine_from_name()
197 enum drm_i915_gem_engine_class engine_class; in engine_from_name() member
214 *engine_class = r->engine_class; in engine_from_name()
167 find_or_create(struct list_head *bo_list, uint64_t addr, enum address_space gtt, enum drm_i915_gem_engine_class engine_class, int engine_instance) find_or_create() argument
191 engine_from_name(const char *engine_name, enum drm_i915_gem_engine_class *engine_class, int *engine_instance) engine_from_name() argument
[all...] |
| H A D | aub_write.h | 134 uint64_t offset, enum drm_i915_gem_engine_class engine_class);
136 enum drm_i915_gem_engine_class engine_class);
|
| H A D | intel_noop_drm_shim.c | 368 info->engines[info->num_engines].engine.engine_class = in i915_ioctl_query()
374 info->engines[info->num_engines].engine.engine_class = in i915_ioctl_query()
|
| /third_party/mesa3d/src/intel/ds/ |
| H A D | intel_driver_ds.cc | 143 i915_engine_class_to_category(enum drm_i915_gem_engine_class engine_class) in i915_engine_class_to_category() argument
145 switch (engine_class) { in i915_engine_class_to_category()
|
| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | anv_utrace.c | 269 switch (family->engine_class) { in queue_family_to_name()
|
| H A D | anv_perf.c | 356 if (queue_family->engine_class != I915_ENGINE_CLASS_RENDER) in anv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR()
|
| H A D | genX_state.c | 467 switch (queue->family->engine_class) { in init_device_state()
|
| H A D | anv_device.c | 696 .engine_class = I915_ENGINE_CLASS_RENDER, in anv_physical_device_init_queue_families()
704 .engine_class = I915_ENGINE_CLASS_RENDER, in anv_physical_device_init_queue_families()
712 .engine_class = compute_class, in anv_physical_device_init_queue_families()
726 .engine_class = I915_ENGINE_CLASS_RENDER, in anv_physical_device_init_queue_families()
3194 engine_classes[engine_count++] = queue_family->engine_class; in anv_CreateDevice()
|
| H A D | anv_private.h | 932 enum drm_i915_gem_engine_class engine_class; member
|
| /third_party/mesa3d/include/drm-uapi/ |
| H A D | i915_drm.h | 236 * @engine_class:
240 __u16 engine_class; member
1994 * engine_class: I915_ENGINE_CLASS_INVALID,
|
| /third_party/libdrm/include/drm/ |
| H A D | i915_drm.h | 1528 __u16 engine_class; member
|