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Searched refs:enable_mask (Results 1 - 6 of 6) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_emit.h81 /* enable_mask controls which states the stateobj is evaluated in,
84 uint32_t enable_mask; member
134 enum fd6_state_id group_id, unsigned enable_mask) in fd6_emit_take_group()
140 g->enable_mask = enable_mask; in fd6_emit_take_group()
145 enum fd6_state_id group_id, unsigned enable_mask) in fd6_emit_add_group()
148 enable_mask); in fd6_emit_add_group()
133 fd6_emit_take_group(struct fd6_emit *emit, struct fd_ringbuffer *stateobj, enum fd6_state_id group_id, unsigned enable_mask) fd6_emit_take_group() argument
144 fd6_emit_add_group(struct fd6_emit *emit, struct fd_ringbuffer *stateobj, enum fd6_state_id group_id, unsigned enable_mask) fd6_emit_add_group() argument
H A Dfd6_emit.c490 unsigned enable_mask; member
524 s[type].enable_mask);
545 s[type].enable_mask);
1036 uint32_t enable_mask = ENABLE_ALL; in fd6_emit_state() local
1057 enable_mask = ENABLE_DRAW; in fd6_emit_state()
1063 enable_mask = CP_SET_DRAW_STATE__0_BINNING; in fd6_emit_state()
1145 fd6_emit_take_group(emit, state, group, enable_mask); in fd6_emit_state()
1157 assert((g->enable_mask & ~ENABLE_ALL) == 0); in fd6_emit_state()
1161 CP_SET_DRAW_STATE__0_DISABLE | g->enable_mask | in fd6_emit_state()
1166 OUT_RING(ring, CP_SET_DRAW_STATE__0_COUNT(n) | g->enable_mask | in fd6_emit_state()
[all...]
/third_party/mesa3d/src/freedreno/decode/
H A Dbuffers.c134 has_dumped(uint64_t gpuaddr, unsigned enable_mask) in has_dumped() argument
161 if ((b->offsets[n].dumped_mask & enable_mask) == enable_mask) in has_dumped()
164 b->offsets[n].dumped_mask |= enable_mask; in has_dumped()
H A Dcffdec.c971 } enable_mask = MODE_ALL; variable
1065 unsigned saved_enable_mask = enable_mask; in do_query_compare()
1076 enable_mask = MODE_ALL; in do_query_compare()
1083 enable_mask = MODE_BINNING; in do_query_compare()
1090 enable_mask = MODE_GMEM | MODE_BYPASS; in do_query_compare()
1099 enable_mask = saved_enable_mask; in do_query_compare()
2159 if (options->once && has_dumped(ibaddr, enable_mask)) in cp_indirect()
2163 * process the cmdstream for *any* enable_mask mode, since we are in cp_indirect()
2295 uint16_t enable_mask; member
2338 printl(2, "%senable_mask: 0x%x\n", levels[level], ds->enable_mask); in load_group()
2390 uint32_t enable_mask = (dwords[i] >> 20) & 0xf; cp_set_draw_state() local
[all...]
H A Dbuffers.h34 bool has_dumped(uint64_t gpuaddr, unsigned enable_mask);
/third_party/mesa3d/src/freedreno/vulkan/
H A Dtu_cmd_buffer.c489 uint32_t enable_mask; in tu_cs_emit_draw_state() local
499 enable_mask = CP_SET_DRAW_STATE__0_GMEM | in tu_cs_emit_draw_state()
504 enable_mask = CP_SET_DRAW_STATE__0_BINNING; in tu_cs_emit_draw_state()
508 enable_mask = CP_SET_DRAW_STATE__0_GMEM; in tu_cs_emit_draw_state()
512 enable_mask = CP_SET_DRAW_STATE__0_SYSMEM; in tu_cs_emit_draw_state()
515 enable_mask = CP_SET_DRAW_STATE__0_GMEM | in tu_cs_emit_draw_state()
534 enable_mask |= CP_SET_DRAW_STATE__0_DIRTY; in tu_cs_emit_draw_state()
537 enable_mask | in tu_cs_emit_draw_state()

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