Searched refs:dst_full (Results 1 - 5 of 5) sorted by relevance
| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_pair_schedule.c | 493 * dst_full is an rgb instruction, meaning that it has a vector instruction(rgb)
499 struct rc_pair_instruction * dst_full, in merge_presub_sources()
507 assert(dst_full->Alpha.Opcode == RC_OPCODE_NOP); in merge_presub_sources()
513 dst_sub = &dst_full->RGB; in merge_presub_sources()
518 dst_sub = &dst_full->Alpha; in merge_presub_sources()
525 info = rc_get_opcode_info(dst_full->RGB.Opcode); in merge_presub_sources()
539 free_source = rc_pair_alloc_source(dst_full, is_rgb, is_alpha, in merge_presub_sources()
554 free_source = rc_pair_alloc_source(dst_full, is_rgb, in merge_presub_sources()
573 if (!(rc_source_type_swz(dst_full->RGB.Arg[arg].Swizzle) in merge_presub_sources()
578 if (dst_full in merge_presub_sources()
498 merge_presub_sources( struct rc_pair_instruction * dst_full, struct rc_pair_sub_instruction src, unsigned int type) merge_presub_sources() argument
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| /third_party/ffmpeg/tests/checkasm/ |
| H A D | h264dsp.c | 234 LOCAL_ALIGNED_16(uint8_t, dst_full, [16 * 16 * 2]); in check_idct_multiple()
287 memcpy(&dst_full[offset + y * 16 * SIZEOF_PIXEL], in check_idct_multiple()
305 memcpy(dst0, dst_full, 16 * 16 * SIZEOF_PIXEL); in check_idct_multiple()
306 memcpy(dst1, dst_full, 16 * 16 * SIZEOF_PIXEL); in check_idct_multiple()
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| /third_party/mesa3d/src/gallium/drivers/etnaviv/ |
| H A D | etnaviv_asm.c | 109 COND(inst->dst_full, VIV_ISA_WORD_3_DST_FULL); in etna_assemble()
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| H A D | etnaviv_asm.h | 99 unsigned dst_full:1; /* write to highp register */ member
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| H A D | etnaviv_disasm.c | 85 uint32_t dst_full : 1; member
607 if (instr->dst_full) in print_instr()
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