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Help
Searched
refs:dccRamBaseAlign
(Results
1 - 8
of
8
) sorted by relevance
/third_party/mesa3d/src/amd/addrlib/src/r800/
H
A
D
ciaddrlib.cpp
241
pOut->
dccRamBaseAlign
= pIn->tileInfo.banks *
in HwlComputeDccInfo()
247
ADDR_ASSERT(IsPow2(pOut->
dccRamBaseAlign
));
in HwlComputeDccInfo()
249
if (0 == (pOut->dccRamSize & (pOut->
dccRamBaseAlign
- 1)))
in HwlComputeDccInfo()
/third_party/mesa3d/src/amd/addrlib/inc/
H
A
D
addrinterface.h
2292
UINT_32
dccRamBaseAlign
; ///< Base alignment of dcc key
member
3402
UINT_32
dccRamBaseAlign
; ///< Base alignment of dcc key
member
/third_party/mesa3d/src/amd/common/
H
A
D
ac_surface.c
756
surf->meta_alignment_log2 = MAX2(surf->meta_alignment_log2, util_logbase2(AddrDccOut->
dccRamBaseAlign
));
in gfx6_compute_level()
1935
surf->meta_alignment_log2 = util_logbase2(dout.
dccRamBaseAlign
);
in gfx9_compute_miptree()
2013
surf->u.gfx9.color.display_dcc_alignment_log2 = util_logbase2(dout.
dccRamBaseAlign
);
in gfx9_compute_miptree()
/third_party/mesa3d/src/amd/addrlib/src/core/
H
A
D
addrlib2.cpp
801
ValidMetaBaseAlignments(pOut->
dccRamBaseAlign
);
in ComputeDccInfo()
H
A
D
addrlib1.cpp
1457
ValidMetaBaseAlignments(pOut->
dccRamBaseAlign
);
in ComputeDccInfo()
/third_party/mesa3d/src/amd/addrlib/src/gfx9/
H
A
D
gfx9addrlib.cpp
609
pOut->
dccRamBaseAlign
= numPipeTotal * m_pipeInterleaveBytes;
in HwlComputeDccInfo()
610
pOut->dccRamSize = PowTwoAlign((pIn->dataSurfaceSize / 256), pOut->
dccRamBaseAlign
);
in HwlComputeDccInfo()
693
pOut->
dccRamBaseAlign
= Max(numCompressBlkPerMetaBlk, sizeAlign);
in HwlComputeDccInfo()
/third_party/mesa3d/src/amd/addrlib/src/gfx11/
H
A
D
gfx11addrlib.cpp
312
pOut->
dccRamBaseAlign
= metaBlkSize;
in HwlComputeDccInfo()
/third_party/mesa3d/src/amd/addrlib/src/gfx10/
H
A
D
gfx10addrlib.cpp
443
pOut->
dccRamBaseAlign
= metaBlkSize;
in HwlComputeDccInfo()
Completed in 44 milliseconds