Searched refs:control_data_bits (Results 1 - 5 of 5) sorted by relevance
/third_party/mesa3d/src/intel/compiler/ |
H A D | brw_vec4_gs_visitor.cpp | 184 this->control_data_bits = src_reg(this, glsl_type::uint_type); in emit_prolog() 187 * will set control_data_bits to 0 after emitting the first vertex. in emit_prolog() 192 inst = emit(MOV(dst_reg(this->control_data_bits), brw_imm_ud(0u))); in emit_prolog() 269 * Write out a batch of 32 control data bits from the control_data_bits 273 * the URB receives the control data bits. The control_data_bits register is 372 inst = emit(MOV(mrf_reg2, this->control_data_bits)); in emit_control_data_bits() 383 /* control_data_bits |= stream_id << ((2 * (vertex_count - 1)) % 32) */ in set_stream_control_data_bits() 416 emit(OR(dst_reg(this->control_data_bits), this->control_data_bits, mask)); in set_stream_control_data_bits() 480 /* Reset control_data_bits t in gs_emit_vertex() [all...] |
H A D | brw_vec4_gs_visitor.h | 70 src_reg control_data_bits; member in brw::vec4_gs_visitor
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H A D | brw_fs.h | 421 fs_reg control_data_bits; member in fs_visitor
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H A D | brw_fs_nir.cpp | 2233 * will cause us to set bit 31 of the control_data_bits register to 1. 2244 * control_data_bits register to 0 when the first vertex is emitted. 2249 /* control_data_bits |= 1 << ((vertex_count - 1) % 32) */ 2258 abld.OR(this->control_data_bits, this->control_data_bits, mask); 2347 sources[i] = this->control_data_bits; 2373 /* control_data_bits |= stream_id << ((2 * (vertex_count - 1)) % 32) */ 2408 abld.OR(this->control_data_bits, this->control_data_bits, mask); 2482 /* Reset control_data_bits t [all...] |
H A D | brw_fs.cpp | 6813 this->control_data_bits = vgrf(glsl_type::uint_type); 6816 * will set control_data_bits to 0 after emitting the first vertex. 6821 abld.MOV(this->control_data_bits, brw_imm_ud(0u));
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