Home
last modified time | relevance | path

Searched refs:const_state (Results 1 - 23 of 23) sorted by relevance

/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_disk_cache.c44 * for this reason, because binning pass variants share const_state with
137 blob_copy_bytes(blob, v->const_state, sizeof(*v->const_state)); in retrieve_variant()
138 unsigned immeds_sz = v->const_state->immediates_size * in retrieve_variant()
139 sizeof(v->const_state->immediates[0]); in retrieve_variant()
140 v->const_state->immediates = ralloc_size(v->const_state, immeds_sz); in retrieve_variant()
141 blob_copy_bytes(blob, v->const_state->immediates, immeds_sz); in retrieve_variant()
159 blob_write_bytes(blob, v->const_state, sizeof(*v->const_state)); in store_variant()
[all...]
H A Dir3_cp.c209 struct ir3_const_state *const_state = ir3_const_state(ctx->so); in lower_immed() local
210 if (const_state->immediates_count == const_state->immediates_size) { in lower_immed()
211 const_state->immediates = rerzalloc( in lower_immed()
212 const_state, const_state->immediates, in lower_immed()
213 __typeof__(const_state->immediates[0]), const_state->immediates_size, in lower_immed()
214 const_state->immediates_size + 4); in lower_immed()
215 const_state in lower_immed()
[all...]
H A Dir3_nir.c812 /* Binning pass variants re-use the const_state of the corresponding in ir3_nir_lower_variant()
936 struct ir3_const_state *const_state) in ir3_setup_const_state()
940 memset(&const_state->offsets, ~0, sizeof(const_state->offsets)); in ir3_setup_const_state()
942 ir3_nir_scan_driver_consts(compiler, nir, const_state); in ir3_setup_const_state()
945 const_state->num_driver_params = in ir3_setup_const_state()
946 MAX2(const_state->num_driver_params, IR3_DP_VTXCNT_MAX + 1); in ir3_setup_const_state()
949 const_state->num_ubos = nir->info.num_ubos; in ir3_setup_const_state()
951 assert((const_state->ubo_state.size % 16) == 0); in ir3_setup_const_state()
953 const_state in ir3_setup_const_state()
935 ir3_setup_const_state(nir_shader *nir, struct ir3_shader_variant *v, struct ir3_const_state *const_state) ir3_setup_const_state() argument
[all...]
H A Dir3_nir_analyze_ubo_ranges.c346 copy_ubo_to_uniform(nir_shader *nir, const struct ir3_const_state *const_state) in copy_ubo_to_uniform() argument
348 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in copy_ubo_to_uniform()
352 state->range[0].ubo.block == const_state->constant_data_ubo)) in copy_ubo_to_uniform()
368 range->ubo.block == const_state->constant_data_ubo) in copy_ubo_to_uniform()
409 struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_analyze_ubo_ranges() local
410 struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_nir_analyze_ubo_ranges()
420 .preamble_size = const_state->preamble_size, in ir3_nir_analyze_ubo_ranges()
469 * variants const_state and ubo state. To make these clear, in this in ir3_nir_lower_ubo_loads()
472 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_lower_ubo_loads() local
473 const struct ir3_ubo_analysis_state *state = &const_state in ir3_nir_lower_ubo_loads()
589 struct ir3_const_state *const_state = data; ir3_nir_lower_load_const_instr() local
644 struct ir3_const_state *const_state = ir3_const_state(v); ir3_nir_lower_load_constant() local
[all...]
H A Dir3_nir_opt_preamble.c263 struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_opt_preamble() local
267 max_size = const_state->preamble_size * 4; in ir3_nir_opt_preamble()
291 const_state->preamble_size = DIV_ROUND_UP(size, 4); in ir3_nir_opt_preamble()
307 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_lower_preamble() local
309 const_state->ubo_state.size / 4; in ir3_nir_lower_preamble()
310 unsigned preamble_size = const_state->preamble_size * 4; in ir3_nir_lower_preamble()
H A Dir3_assembler.c43 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in ir3_parse_asm()
H A Dir3_shader.c381 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in alloc_variant()
382 v->const_state->shared_consts_enable = shader->shared_consts_enable; in alloc_variant()
813 const struct ir3_const_state *const_state = ir3_const_state(so); in ir3_shader_disasm() local
814 for (i = 0; i < DIV_ROUND_UP(const_state->immediates_count, 4); i++) { in ir3_shader_disasm()
815 fprintf(out, "@const(c%d.x)\t", const_state->offsets.immediate + i); in ir3_shader_disasm()
817 const_state->immediates[i * 4 + 0], in ir3_shader_disasm()
818 const_state->immediates[i * 4 + 1], in ir3_shader_disasm()
819 const_state->immediates[i * 4 + 2], in ir3_shader_disasm()
820 const_state in ir3_shader_disasm()
[all...]
H A Dir3_parser.y211 struct ir3_const_state *const_state = ir3_const_state(variant);
214 if (idx * 4 + 4 > const_state->immediates_size) {
215 const_state->immediates = rerzalloc(const_state,
216 const_state->immediates,
217 __typeof__(const_state->immediates[0]),
218 const_state->immediates_size,
220 for (unsigned i = const_state->immediates_size; i < idx * 4; i++)
221 const_state->immediates[i] = 0xd0d0d0d0;
222 const_state
[all...]
H A Dir3_a4xx.c234 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in get_image_offset() local
235 assert(const_state->image_dims.mask & (1 << index)); in get_image_offset()
237 cb = regid(const_state->offsets.image_dims, 0) + in get_image_offset()
238 const_state->image_dims.off[index]; in get_image_offset()
H A Dir3_shader.h534 struct ir3_const_state *const_state; member
871 * corresponding draw pass shaders const_state.
877 return v->nonbinning->const_state; in ir3_const_state()
878 return v->const_state; in ir3_const_state()
H A Dir3_nir.h71 struct ir3_const_state *const_state);
H A Dir3_compiler_nir.c109 struct ir3_const_state *const_state = ir3_const_state(ctx->so); in create_driver_param() local
110 unsigned n = const_state->offsets.driver_param; in create_driver_param()
943 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_intrinsic_load_ubo() local
944 unsigned ubo = regid(const_state->offsets.ubo, 0); in emit_intrinsic_load_ubo()
966 const_state->offsets.ubo + (ctx->s->info.num_ubos * ptrsz)); in emit_intrinsic_load_ubo()
1021 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_intrinsic_load_kernel_input() local
1024 unsigned p = regid(const_state->offsets.kernel_params, 0); in emit_intrinsic_load_kernel_input()
2051 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_intrinsic() local
2052 const unsigned primitive_param = const_state->offsets.primitive_param * 4; in emit_intrinsic()
2053 const unsigned primitive_map = const_state in emit_intrinsic()
3819 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); emit_stream_out() local
[all...]
H A Dir3.c72 struct ir3_const_state *const_state, in is_shared_consts()
75 if (const_state->shared_consts_enable && reg->flags & IR3_REG_CONST) { in is_shared_consts()
71 is_shared_consts(struct ir3_compiler *compiler, struct ir3_const_state *const_state, struct ir3_register *reg) is_shared_consts() argument
/third_party/mesa3d/src/gallium/drivers/freedreno/ir3/
H A Dir3_const.h118 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_constant_data() local
119 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_emit_constant_data()
123 if (ubo != const_state->constant_data_ubo) in ir3_emit_constant_data()
159 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_user_consts() local
160 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_emit_user_consts()
166 ubo == const_state->constant_data_ubo) { in ir3_emit_user_consts()
207 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_ubos() local
208 uint32_t offset = const_state->offsets.ubo; in ir3_emit_ubos()
217 uint32_t params = const_state->num_ubos; in ir3_emit_ubos()
222 if (i == const_state in ir3_emit_ubos()
262 const struct ir3_const_state *const_state = ir3_const_state(v); ir3_emit_image_dims() local
315 const struct ir3_const_state *const_state = ir3_const_state(v); ir3_emit_immediates() local
343 const struct ir3_const_state *const_state = ir3_const_state(v); ir3_emit_link_map() local
366 const struct ir3_const_state *const_state = ir3_const_state(v); emit_tfbos() local
442 const struct ir3_const_state *const_state = ir3_const_state(v); global() variable
461 const struct ir3_const_state *const_state = ir3_const_state(v); global() variable
577 const struct ir3_const_state *const_state = ir3_const_state(v); global() variable
[all...]
H A Dir3_cmdline.c430 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in main()
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_const.c114 const struct ir3_const_state *const_state = ir3_const_state(v); in emit_stage_tess_consts() local
115 const unsigned regid = const_state->offsets.primitive_param; in emit_stage_tess_consts()
191 const struct ir3_const_state *const_state = ir3_const_state(v); in fd6_emit_ubos() local
192 int num_ubos = const_state->num_ubos; in fd6_emit_ubos()
208 if (i == const_state->constant_data_ubo) { in fd6_emit_ubos()
242 struct ir3_const_state *const_state = ir3_const_state(v); in user_consts_cmdstream_size() local
243 struct ir3_ubo_analysis_state *ubo_state = &const_state->ubo_state; in user_consts_cmdstream_size()
253 size += 2 * const_state->num_ubos; in user_consts_cmdstream_size()
H A Dfd6_program.c370 const struct ir3_const_state *const_state = ir3_const_state(s); variable
371 const unsigned regid = const_state->offsets.primitive_param + 1;
/third_party/mesa3d/src/freedreno/computerator/
H A Da6xx.c265 const struct ir3_const_state *const_state = ir3_const_state(v); in cs_const_emit() local
266 uint32_t base = const_state->offsets.immediate; in cs_const_emit()
267 int size = DIV_ROUND_UP(const_state->immediates_count, 4); in cs_const_emit()
272 const_state->immediates[idx * 4 + 0] = grid[0]; in cs_const_emit()
273 const_state->immediates[idx * 4 + 1] = grid[1]; in cs_const_emit()
274 const_state->immediates[idx * 4 + 2] = grid[2]; in cs_const_emit()
284 const_state->immediates[idx * 4 + 1] = iova >> 32; in cs_const_emit()
285 const_state->immediates[idx * 4 + 0] = (iova << 32) >> 32; in cs_const_emit()
299 emit_const(ring, base, size, const_state->immediates); in cs_const_emit()
H A Da4xx.c208 const struct ir3_const_state *const_state = ir3_const_state(v); in cs_const_emit() local
209 uint32_t base = const_state->offsets.immediate; in cs_const_emit()
210 int size = DIV_ROUND_UP(const_state->immediates_count, 4); in cs_const_emit()
222 emit_const(ring, kernel, base, size, const_state->immediates); in cs_const_emit()
/third_party/mesa3d/src/freedreno/vulkan/
H A Dtu_pipeline.c403 const struct ir3_const_state *const_state = ir3_const_state(xs); in tu_xs_get_immediates_packet_size_dwords() local
404 uint32_t base = const_state->offsets.immediate; in tu_xs_get_immediates_packet_size_dwords()
405 int32_t size = DIV_ROUND_UP(const_state->immediates_count, 4); in tu_xs_get_immediates_packet_size_dwords()
422 const struct ir3_const_state *const_state = ir3_const_state(xs); in tu_xs_get_additional_cs_size_dwords() local
427 size += 4 * const_state->ubo_state.num_enabled; in tu_xs_get_additional_cs_size_dwords()
576 const struct ir3_const_state *const_state = ir3_const_state(xs); in tu6_emit_xs() local
577 uint32_t base = const_state->offsets.immediate; in tu6_emit_xs()
590 tu_cs_emit_array(cs, const_state->immediates, immediate_size); in tu6_emit_xs()
593 if (const_state->constant_data_ubo != -1) { in tu6_emit_xs()
599 CP_LOAD_STATE6_0_DST_OFF(const_state in tu6_emit_xs()
915 const struct ir3_const_state *const_state = ir3_const_state(consumer); tu6_emit_link_map() local
[all...]
H A Dtu_pipeline.h90 struct ir3_const_state const_state; member
H A Dtu_cmd_buffer.c4614 const struct ir3_const_state *const_state = &link->const_state; in vs_params_offset() local
4616 if (const_state->offsets.driver_param >= link->constlen) in vs_params_offset()
4625 assert(const_state->offsets.driver_param != 0); in vs_params_offset()
4627 return const_state->offsets.driver_param; in vs_params_offset()
4936 const struct ir3_const_state *const_state = &link->const_state; in tu_emit_compute_driver_params() local
4937 uint32_t offset = const_state->offsets.driver_param; in tu_emit_compute_driver_params()
4944 uint32_t num_consts = MIN2(const_state->num_driver_params, in tu_emit_compute_driver_params()
/third_party/mesa3d/src/gallium/drivers/freedreno/a4xx/
H A Dfd4_compute.c75 uint32_t driver_param_base = v->const_state->offsets.driver_param * 4; in cs_program_emit()

Completed in 32 milliseconds