Searched refs:clear_aspects (Results 1 - 2 of 2) sorted by relevance
| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | genX_cmd_buffer.c | 472 VkImageAspectFlags clear_aspects, in anv_can_hiz_clear_ds_view()
481 if (!(clear_aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) in anv_can_hiz_clear_ds_view()
6761 VkImageAspectFlags clear_aspects = 0; in CmdBeginRendering() local
6764 clear_aspects |= VK_IMAGE_ASPECT_DEPTH_BIT; in CmdBeginRendering()
6767 clear_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT; in CmdBeginRendering()
6769 if (clear_aspects != 0) { in CmdBeginRendering()
6772 depth_layout, clear_aspects, in CmdBeginRendering()
6834 clear_aspects, in CmdBeginRendering()
6840 clear_aspects, in CmdBeginRendering()
6855 clear_aspects, in CmdBeginRendering()
469 anv_can_hiz_clear_ds_view(struct anv_device *device, const struct anv_image_view *iview, VkImageLayout layout, VkImageAspectFlags clear_aspects, float depth_clear_value, VkRect2D render_area) anv_can_hiz_clear_ds_view() argument
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| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_cmd_buffer.c | 4779 VkImageAspectFlags clear_aspects = 0; in radv_cmd_state_setup_attachments() local
4784 clear_aspects |= VK_IMAGE_ASPECT_COLOR_BIT; in radv_cmd_state_setup_attachments()
4790 clear_aspects |= VK_IMAGE_ASPECT_DEPTH_BIT; in radv_cmd_state_setup_attachments()
4793 clear_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT; in radv_cmd_state_setup_attachments()
4797 clear_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT; in radv_cmd_state_setup_attachments()
4801 state->attachments[i].pending_clear_aspects = clear_aspects; in radv_cmd_state_setup_attachments()
4803 if (clear_aspects && info) { in radv_cmd_state_setup_attachments()
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