| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_tgsi.c | 246 unsigned chan_index; in lp_build_tgsi_inst_llvm() local
274 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) { in lp_build_tgsi_inst_llvm()
275 emit_data.output[chan_index] = bld_base->base.undef; in lp_build_tgsi_inst_llvm()
279 TGSI_FOR_EACH_DST1_ENABLED_CHANNEL(inst, chan_index) { in lp_build_tgsi_inst_llvm()
280 emit_data.output1[chan_index] = bld_base->base.undef; in lp_build_tgsi_inst_llvm()
290 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) { in lp_build_tgsi_inst_llvm()
291 int src_index = get_src_chan_idx(inst->Instruction.Opcode, chan_index); in lp_build_tgsi_inst_llvm()
295 emit_data.chan = chan_index; in lp_build_tgsi_inst_llvm()
320 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) { in lp_build_tgsi_inst_llvm()
321 emit_data.output[chan_index] in lp_build_tgsi_inst_llvm()
344 lp_build_emit_fetch_src(struct lp_build_tgsi_context *bld_base, const struct tgsi_full_src_register *reg, enum tgsi_opcode_type stype, const unsigned chan_index) lp_build_emit_fetch_src() argument
444 lp_build_emit_fetch(struct lp_build_tgsi_context *bld_base, const struct tgsi_full_instruction *inst, unsigned src_op, const unsigned chan_index) lp_build_emit_fetch() argument
458 lp_build_emit_fetch_texoffset(struct lp_build_tgsi_context *bld_base, const struct tgsi_full_instruction *inst, unsigned tex_off_op, const unsigned chan_index) lp_build_emit_fetch_texoffset() argument
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| H A D | lp_bld_tgsi_soa.c | 771 unsigned chan_index, in get_soa_array_offsets()
776 lp_build_const_int_vec(uint_bld->gallivm, uint_bld->type, chan_index); in get_soa_array_offsets()
781 /* index_vec = (indirect_index * 4 + chan_index) * length + offsets */ in get_soa_array_offsets()
1680 unsigned chan_index, in emit_store_output()
1699 chan_index, in emit_store_output()
1712 chan_index); in emit_store_output()
1716 chan_index + 1); in emit_store_output()
1729 unsigned chan_index, in emit_store_tcs_output()
1768 channel_index = lp_build_const_int32(gallivm, chan_index); in emit_store_tcs_output()
1788 unsigned chan_index, in emit_store_temp()
769 get_soa_array_offsets(struct lp_build_context *uint_bld, LLVMValueRef indirect_index, unsigned chan_index, boolean need_perelement_offset) get_soa_array_offsets() argument
1676 emit_store_output(struct lp_build_tgsi_context *bld_base, enum tgsi_opcode_type dtype, const struct tgsi_full_dst_register *reg, unsigned index, unsigned chan_index, LLVMValueRef indirect_index, LLVMValueRef value) emit_store_output() argument
1725 emit_store_tcs_output(struct lp_build_tgsi_context *bld_base, enum tgsi_opcode_type dtype, const struct tgsi_full_dst_register *reg, unsigned index, unsigned chan_index, LLVMValueRef indirect_index, LLVMValueRef value) emit_store_tcs_output() argument
1784 emit_store_temp(struct lp_build_tgsi_context *bld_base, enum tgsi_opcode_type dtype, const struct tgsi_full_dst_register *reg, unsigned index, unsigned chan_index, LLVMValueRef indirect_index, LLVMValueRef value) emit_store_temp() argument
1837 emit_store_address(struct lp_build_tgsi_context *bld_base, enum tgsi_opcode_type dtype, const struct tgsi_full_dst_register *reg, unsigned index, unsigned chan_index, LLVMValueRef indirect_index, LLVMValueRef value) emit_store_address() argument
1861 emit_store_chan( struct lp_build_tgsi_context *bld_base, const struct tgsi_full_instruction *inst, unsigned index, unsigned chan_index, LLVMValueRef value) emit_store_chan() argument
1966 unsigned chan_index = u_bit_scan(&writemask); emit_store() local
2729 unsigned chan_index; emit_kill_if() local
3486 unsigned chan_index; load_emit() local
3505 unsigned chan_index; load_emit() local
3624 unsigned chan_index; store_emit() local
[all...] |
| H A D | lp_bld_tgsi.h | 739 const unsigned chan_index);
746 const unsigned chan_index);
754 const unsigned chan_index);
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| H A D | lp_bld_nir_soa.c | 192 unsigned chan_index, in get_soa_array_offsets()
197 lp_build_const_int_vec(uint_bld->gallivm, uint_bld->type, chan_index); in get_soa_array_offsets()
202 /* index_vec = (indirect_index * 4 + chan_index) * length + offsets */ in get_soa_array_offsets()
189 get_soa_array_offsets(struct lp_build_context *uint_bld, LLVMValueRef indirect_index, int num_components, unsigned chan_index, bool need_perelement_offset) get_soa_array_offsets() argument
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_vec4_builder.h | 351 const dst_reg chan_index = in emit_uniformize() local
355 ubld.emit(SHADER_OPCODE_FIND_LIVE_CHANNEL, chan_index); in emit_uniformize()
356 ubld.emit(SHADER_OPCODE_BROADCAST, dst, src, src_reg(chan_index)); in emit_uniformize()
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| H A D | brw_fs_builder.h | 407 /* FIXME: We use a vector chan_index and dst to allow constant and in emit_uniformize()
415 const dst_reg chan_index = vgrf(BRW_REGISTER_TYPE_UD); in emit_uniformize() local
418 ubld.emit(SHADER_OPCODE_FIND_LIVE_CHANNEL, chan_index); in emit_uniformize()
419 ubld.emit(SHADER_OPCODE_BROADCAST, dst, src, component(chan_index, 0)); in emit_uniformize()
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| H A D | brw_vec4_visitor.cpp | 779 const src_reg chan_index(this, glsl_type::uint_type); in emit_uniformize()
783 emit(SHADER_OPCODE_FIND_LIVE_CHANNEL, dst_reg(chan_index)) in emit_uniformize()
785 emit(SHADER_OPCODE_BROADCAST, dst, src, chan_index) in emit_uniformize()
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| H A D | brw_fs_nir.cpp | 4180 const fs_reg &chan_index =
4190 bld.OR(addr, addr, chan_index);
4199 bld.SHL(chan_addr, chan_index, brw_imm_ud(2));
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| /third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_exec.c | 1595 const uint chan_index) in fetch_source_d()
1604 swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index ); in fetch_source_d()
1617 const uint chan_index, in fetch_source()
1620 fetch_source_d(mach, chan, reg, chan_index); in fetch_source()
1640 uint chan_index) in store_dest_dstret()
1691 dst = &mach->Outputs[offset + index].xyzw[chan_index]; in store_dest_dstret()
1709 dst = &mach->Temps[offset + index].xyzw[chan_index]; in store_dest_dstret()
1715 dst = &mach->Addrs[index].xyzw[chan_index]; in store_dest_dstret()
1729 uint chan_index) in store_dest_double()
1735 dst = store_dest_dstret(mach, chan, reg, chan_index); in store_dest_double()
1592 fetch_source_d(const struct tgsi_exec_machine *mach, union tgsi_exec_channel *chan, const struct tgsi_full_src_register *reg, const uint chan_index) fetch_source_d() argument
1614 fetch_source(const struct tgsi_exec_machine *mach, union tgsi_exec_channel *chan, const struct tgsi_full_src_register *reg, const uint chan_index, enum tgsi_exec_datatype src_datatype) fetch_source() argument
1637 store_dest_dstret(struct tgsi_exec_machine *mach, const union tgsi_exec_channel *chan, const struct tgsi_full_dst_register *reg, uint chan_index) store_dest_dstret() argument
1726 store_dest_double(struct tgsi_exec_machine *mach, const union tgsi_exec_channel *chan, const struct tgsi_full_dst_register *reg, uint chan_index) store_dest_double() argument
1746 store_dest(struct tgsi_exec_machine *mach, const union tgsi_exec_channel *chan, const struct tgsi_full_dst_register *reg, const struct tgsi_full_instruction *inst, uint chan_index) store_dest() argument
1788 uint chan_index; exec_kill_if() local
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| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_nir_to_llvm.c | 455 LLVMValueRef chan_index = buffer_index; in load_vs_input() local
461 chan_index = LLVMBuildAdd(ctx->ac.builder, buffer_index, buffer_offset, ""); in load_vs_input()
467 &ctx->ac, t_list, chan_index, LLVMConstInt(ctx->ac.i32, chan_offset, false), in load_vs_input()
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