| /third_party/libdrm/radeon/ |
| H A D | radeon_surface.c | 676 mtileh = (tileh * surf->bankh * surf_man->hw_info.num_banks) / surf->mtilea; in eg_surface_init_2d()
770 switch (surf->bankh) { in eg_surface_sanity()
780 if ((tileb * surf->bankh * surf->bankw) < surf_man->hw_info.group_bytes) { in eg_surface_sanity()
905 /* compute best tile_split, bankw, bankh, mtilea
920 surf->bankh = 1; in eg_surface_best()
923 for (; surf->bankh <= 8; surf->bankh *= 2) { in eg_surface_best()
924 if ((tileb * surf->bankh * surf->bankw) >= surf_man->hw_info.group_bytes) { in eg_surface_best()
978 /* bankw or bankh greater than 1 increase alignment requirement, not in eg_surface_best()
979 * sure if it's worth using smaller bankw & bankh t in eg_surface_best()
[all...] |
| H A D | radeon_surface.h | 124 * overridden (things lile bankw/bankh on evergreen for
131 uint32_t bankh; member
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| /third_party/mesa3d/src/gallium/winsys/radeon/drm/ |
| H A D | radeon_drm_surface.c | 152 surf_drm->bankh = surf_ws->u.legacy.bankh; in surf_winsys_to_drm()
194 surf_ws->u.legacy.bankh = surf_drm->bankh; in surf_drm_to_winsys()
412 surf_ws->u.legacy.color.fmask.bankh = fmask.u.legacy.bankh; in radeon_winsys_surface_init()
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| H A D | radeon_drm_bo.c | 901 surf->u.legacy.bankh = (args.tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK; in radeon_bo_get_metadata()
924 md->u.legacy.bankh = (args.tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK; in radeon_bo_get_metadata()
953 args.tiling_flags |= (surf->u.legacy.bankh & RADEON_TILING_EG_BANKH_MASK) << in radeon_bo_set_metadata()
978 args.tiling_flags |= (md->u.legacy.bankh & RADEON_TILING_EG_BANKH_MASK) << in radeon_bo_set_metadata()
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| H A D | radeon_video.c | 162 wh = surfaces[i]->u.legacy.bankw * surfaces[i]->u.legacy.bankh; in rvid_join_surfaces()
178 surfaces[i]->u.legacy.bankh = surfaces[best_tiling]->u.legacy.bankh; in rvid_join_surfaces()
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| H A D | r600_texture.c | 285 metadata->u.legacy.bankh = surface->u.legacy.bankh; in r600_texture_init_metadata()
301 surf->u.legacy.bankh = metadata->u.legacy.bankh; in r600_surface_import_metadata()
610 fmask.u.legacy.bankh = rtex->surface.u.legacy.bankh; in r600_texture_get_fmask_info()
615 fmask.u.legacy.bankh = 4; in r600_texture_get_fmask_info()
651 out->bank_height = fmask.u.legacy.bankh; in r600_texture_get_fmask_info()
835 "bankh=%u, nbanks=%u, mtilea=%u, tilesplit=%u, pipeconfig=%u, scanout=%u\n", in r600_print_texture_info()
837 rtex->surface.u.legacy.bankh, rte in r600_print_texture_info()
[all...] |
| H A D | evergreen_state.c | 736 unsigned macro_aspect, tile_split, bankh, bankw, nbanks, fmask_bankh; in evergreen_fill_tex_resource_words() local
816 bankh = tmp->surface.u.legacy.bankh; in evergreen_fill_tex_resource_words()
820 bankh = eg_bank_wh(bankh); in evergreen_fill_tex_resource_words()
904 S_03001C_BANK_HEIGHT(bankh) | in evergreen_fill_tex_resource_words()
1126 unsigned non_disp_tiling, macro_aspect, tile_split, bankh, bankw, fmask_bankh, nbanks; in evergreen_set_color_surface_common() local
1165 bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1169 fmask_bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1362 unsigned macro_aspect, tile_split, bankh, bankw, nbanks; evergreen_init_depth_surface() local
[all...] |
| H A D | radeon_uvd.c | 1242 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh); in ruvd_set_dt_surfaces()
1247 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh)); in ruvd_set_dt_surfaces()
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| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_surface.h | 109 uint8_t bankh; /* max 8 */ member
115 unsigned bankh : 4; /* max 8 */ member
326 * they will be treated as hints (e.g. bankw, bankh) and might be
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| H A D | ac_surface.c | 915 surf->u.legacy.bankh = csio->pTileInfo->bankHeight; in gfx6_surface_settings()
1172 surf->u.legacy.bankh && surf->u.legacy.mtilea && surf->u.legacy.tile_split) { in gfx6_compute_surface()
1177 AddrTileInfoIn.bankHeight = surf->u.legacy.bankh; in gfx6_compute_surface()
1336 surf->u.legacy.color.fmask.bankh = fout.pTileInfo->bankHeight; in gfx6_compute_surface()
2639 surf->u.legacy.bankh = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in ac_surface_set_bo_metadata()
2692 *tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(surf->u.legacy.bankh)); in ac_surface_get_bo_metadata()
3082 " Layout: size=%" PRIu64 ", alignment=%u, bankw=%u, bankh=%u, " in ac_surface_print_info()
3085 surf->u.legacy.bankw, surf->u.legacy.bankh, in ac_surface_print_info()
3093 "alignment=%u, pitch_in_pixels=%u, bankh=%u, " in ac_surface_print_info()
3097 surf->u.legacy.color.fmask.bankh, in ac_surface_print_info()
[all...] |
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_radeon_winsys.h | 146 unsigned bankh; member
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| H A D | radv_image.c | 436 surface->u.legacy.bankh = md->u.legacy.bankh; in radv_patch_surface_from_metadata()
1397 metadata->u.legacy.bankh = surface->u.legacy.bankh; in radv_init_metadata()
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| H A D | radv_device.c | 6411 unsigned fmask_bankh = util_logbase2(surf->u.legacy.color.fmask.bankh); in radv_initialise_color_surface()
6444 unsigned bankh = util_logbase2(surf->u.legacy.bankh); in radv_initialise_color_surface() local
6445 cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); in radv_initialise_color_surface()
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| /third_party/mesa3d/src/gallium/include/winsys/ |
| H A D | radeon_winsys.h | 224 unsigned bankh; member
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| /third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| H A D | radv_amdgpu_bo.c | 912 tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(md->u.legacy.bankh)); in radv_amdgpu_winsys_bo_set_metadata()
960 md->u.legacy.bankh = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in radv_amdgpu_winsys_bo_get_metadata()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | radeon_uvd.c | 1475 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh); in si_uvd_set_dt_surfaces()
1480 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh)); in si_uvd_set_dt_surfaces()
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| H A D | si_state.c | 2611 unsigned fmask_bankh = util_logbase2(tex->surface.u.legacy.color.fmask.bankh); in si_initialize_color_surface()
2655 unsigned bankh = util_logbase2(tex->surface.u.legacy.bankh); in si_initialize_color_surface() local
2656 color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); in si_initialize_color_surface()
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