Searched refs:b000 (Results 1 - 11 of 11) sorted by relevance
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | constants-riscv64.h | 415 RO_JALR = JALR | (0b000 << kFunct3Shift),
416 RO_BEQ = BRANCH | (0b000 << kFunct3Shift),
422 RO_LB = LOAD | (0b000 << kFunct3Shift),
427 RO_SB = STORE | (0b000 << kFunct3Shift),
430 RO_ADDI = OP_IMM | (0b000 << kFunct3Shift),
439 RO_ADD = OP | (0b000 << kFunct3Shift) | (0b0000000 << kFunct7Shift),
440 RO_SUB = OP | (0b000 << kFunct3Shift) | (0b0100000 << kFunct7Shift),
449 RO_FENCE = MISC_MEM | (0b000 << kFunct3Shift),
450 RO_ECALL = SYSTEM | (0b000 << kFunct3Shift),
451 // RO_EBREAK = SYSTEM | (0b000 << kFunct3Shif
[all...] |
| H A D | assembler-riscv64.cc | 1337 GenInstrR(funct7, 0b000, SYSTEM, ToRegister(0), rs1, rs2); in GenInstrPriv()
1529 GenInstrI(0b000, JALR, rd, rs1, imm12); in jalr()
1536 GenInstrBranchCC_rri(0b000, rs1, rs2, imm13); in beq()
1562 GenInstrLoad_ri(0b000, rd, rs1, imm12); in lb()
1584 GenInstrStore_rri(0b000, base, source, imm12); in sb()
1598 GenInstrALU_ri(0b000, rd, rs1, imm12); in addi()
1636 GenInstrALU_rr(0b0000000, 0b000, rd, rs1, rs2); in add()
1640 GenInstrALU_rr(0b0100000, 0b000, rd, rs1, rs2); in sub()
1680 GenInstrI(0b000, MISC_MEM, ToRegister(0), ToRegister(0), imm12); in fence()
1685 GenInstrI(0b000, MISC_ME in fence_tso()
[all...] |
| /third_party/skia/third_party/externals/dawn/src/tests/unittests/ |
| H A D | MathTests.cpp | 289 ASSERT_TRUE(IsSubset(0b000, 0b101)); in TEST()
298 ASSERT_FALSE(IsSubset(0b100, 0b000)); in TEST()
299 ASSERT_FALSE(IsSubset(0b010, 0b000)); in TEST()
300 ASSERT_FALSE(IsSubset(0b001, 0b000)); in TEST()
301 ASSERT_TRUE(IsSubset(0b000, 0b000)); in TEST()
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_reg_type.c | 222 GFX10_ALIGN1_3SRC_REG_TYPE_HF = 0b000,
229 GFX10_ALIGN1_3SRC_REG_TYPE_UD = 0b000,
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| H A D | brw_disasm.c | 342 [0b000] = "OWord Block Read",
351 [0b000] = "OWord block write",
406 [0b000] = "SIMD16",
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| /third_party/mesa3d/src/compiler/glsl/tests/ |
| H A D | array_refcount_test.cpp | 673 operand b000 = deref_array( in TEST_F() local
700 deref_array(var_b, b000), in TEST_F()
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| /third_party/rust/crates/bindgen/bindgen/codegen/ |
| H A D | bitfield_unit_tests.rs | 123 With [0b11100010], then get(2, 3) is 0b000;
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| /third_party/node/deps/v8/src/base/ |
| H A D | virtual-address-space.cc | 33 return 0b000; in PagePermissionsToBitset()
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| /third_party/node/deps/v8/src/execution/riscv64/ |
| H A D | simulator-riscv64.cc | 3777 case 0b000: { // RO_FSGNJ_S in DecodeRVRFPType()
3797 case 0b000: { // RO_FMIN_S in DecodeRVRFPType()
3841 case 0b000: { in DecodeRVRFPType()
3870 case 0b000: { // RO_FLE_S in DecodeRVRFPType()
3907 if (instr_.Funct3Value() == 0b000) { in DecodeRVRFPType()
3992 case 0b000: { // RO_FSGNJ_D in DecodeRVRFPType()
4012 case 0b000: { // RO_FMIN_D in DecodeRVRFPType()
4054 case 0b000: { // RO_FLE_D in DecodeRVRFPType()
4074 case 0b000: { // RO_FMV_X_D in DecodeRVRFPType()
4141 if (instr_.Funct3Value() == 0b000 in DecodeRVRFPType()
[all...] |
| /third_party/node/deps/v8/src/common/ |
| H A D | globals.h | 1628 V(None, 0b000) \
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| /third_party/skia/src/core/ |
| H A D | SkVM.cpp | 1976 void Assembler::add(Operand dst, int imm) { this->op(0x01,0b000, dst,imm); }
1983 this->op(0xC7,dst,(GP64)0b000);
1987 this->op(0xC6,dst,(GP64)0b000);
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