Z5 (reference) in projects: third_party - OpenGrok search results

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Searched refs:Z5 (Results 1 - 7 of 7) sorted by relevance

/third_party/mesa3d/src/amd/addrlib/src/gfx11/
H A D	gfx11SwizzlePattern.h	2072 {Y2^X5^Z5, X3^Y4^Z4, Y3^Z3^X4, Y3, }, // 261 2073 {Y2^X4^Z5, X2^Y4^Z4, X3^Y3^Z3, Y3, }, // 262 2077 {Y2^X6^Z6, X3^Y5^Z5, Z3^Y4^X5, Y3^X4^Z4, }, // 266 2078 {Y2^X5^Z6, X2^Y5^Z5, Z3^X4^Y4, X3^Y3^Z4, }, // 267 2079 {Y2^X5^Z5, X2^Z4^Y5, Z2^X4^Y4, X3^Y3^Z3, }, // 268 2080 {Y1^X5^Z5, X2^Y4^Z4, Z2^Y3^X4, Y2^X3^Z3, }, // 269 2081 {Y1^X4^Z5, X1^Y4^Z4, Z2^X3^Y3, X2^Y2^Z3, }, // 270 2082 {Y2^X7^Z7, X3^Y6^Z6, Z3^Y5^X6, Y3^X5^Z5, }, // 271 2083 {Y2^X6^Z7, X2^Y6^Z6, Z3^X5^Y5, Y3^X4^Z5, }, // 272 2084 {Y2^X6^Z6, X2^Z5 [all...]
/third_party/mesa3d/src/amd/addrlib/src/gfx10/
H A D	gfx10SwizzlePattern.h	3819 {Y4^Z5^X9, X4^Z4^Y9, Z3^Y5^X8, Z2^X5^Y8, }, // 31 3820 {Y3^Z5^X9, X4^Z4^Y8, Z3^Y4^X8, Z2^X5^Y7, }, // 32 3821 {Y3^Z5^X8, X3^Z4^Y8, Z3^Y4^X7, Z2^X4^Y7, }, // 33 3822 {Y2^Z5^X8, X3^Z4^Y7, Y3^Z3^X7, Z2^X4^Y6, }, // 34 3823 {Y2^Z5^X7, X2^Z4^Y7, Y3^Z3^X6, Z2^X3^Y6, }, // 35 3865 {X3^Y3^Z5, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, }, // 77 3934 {Y2^X5^Z5, X3^Y4^Z4, Y3^Z3^X4, Y3, }, // 146 3935 {Y2^X4^Z5, X2^Y4^Z4, X3^Y3^Z3, Y3, }, // 147 3939 {Y2^X6^Z6, X3^Y5^Z5, Z3^Y4^X5, Y3^X4^Z4, }, // 151 3940 {Y2^X5^Z6, X2^Y5^Z5, Z [all...]
/third_party/ffmpeg/libavcodec/aarch64/
H A D	simple_idct_neon.S	`33 #define Z5 12873 //cos(iM_PI/16)sqrt(2)*(1<<14) + 0.5 define 50 .short Z1, Z2, Z3, Z4, Z5, Z6, Z7, Z4c`
/third_party/mesa3d/src/amd/addrlib/src/core/
H A D	addrlib2.h	`203 const UINT_64 Z5 = InitBit(2, 5); member`
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
H A D	AArch64InstPrinter.cpp	`1204 case AArch64::Z4: Reg = AArch64::Z5; break; in getNextVectorRegister() 1205 case AArch64::Z5: Reg = AArch64::Z6; break; in getNextVectorRegister()`
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/
H A D	AArch64Disassembler.cpp	`496 AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7,`
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/
H A D	AArch64AsmParser.cpp	`2193 .Case("z5", AArch64::Z5) in matchSVEDataVectorRegName()`

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