Searched refs:XMM1 (Results 1 - 8 of 8) sorted by relevance
| /third_party/mesa3d/src/mesa/x86/ |
| H A D | common_x86_asm.S | 203 MOVUPS ( REGIND( ESP ), XMM1 )
205 DIVPS ( XMM0, XMM1 )
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| H A D | assyntax.h | 225 #define XMM1 %xmm1 macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 80 static const MCPhysReg RegListXMM[] = {X86::XMM0, X86::XMM1, X86::XMM2, in CC_X86_VectorCallGetSSEs()
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| H A D | X86CallLowering.cpp | 165 static const MCPhysReg XMMArgRegs[] = {X86::XMM0, X86::XMM1, X86::XMM2,
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| H A D | X86FastISel.cpp | 3125 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerArguments()
3462 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerCall()
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| H A D | X86ISelLowering.cpp | 2723 // 64-bit vector (MMX) values are returned in XMM0 / XMM1 except for v1i64 in LowerReturn()
2727 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) { in LowerReturn()
3022 if (VA.getLocReg() == X86::XMM1) in LowerCallResult()
3030 if (VA.getLocReg() == X86::XMM1) in LowerCallResult()
3336 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in get64BitArgumentXMMs()
4009 case X86::XMM1: ShadowReg = X86::RDX; break;
4066 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 220 ENTRY(XMM1) \
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 135 {codeview::RegisterId::XMM1, X86::XMM1}, in initLLVMToSEHAndCVRegMapping()
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