Searched refs:WRITEMASK_XYZW (Results 1 - 24 of 24) sorted by relevance
| /third_party/mesa3d/src/mesa/program/ |
| H A D | programopt.c | 163 newInst[0].DstReg.WriteMask = WRITEMASK_XYZW; in insert_mvp_mad_code()
175 newInst[i].DstReg.WriteMask = WRITEMASK_XYZW; in insert_mvp_mad_code()
190 newInst[3].DstReg.WriteMask = WRITEMASK_XYZW; in insert_mvp_mad_code()
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| H A D | prog_instruction.h | 90 #define WRITEMASK_XYZW 0xf macro
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| H A D | prog_instruction.c | 56 inst[i].DstReg.WriteMask = WRITEMASK_XYZW; in _mesa_init_instructions()
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| H A D | program_parse.y | 973 | { $$.swizzle = SWIZZLE_NOOP; $$.mask = WRITEMASK_XYZW; }
977 | { $$.swizzle = SWIZZLE_NOOP; $$.mask = WRITEMASK_XYZW; }
2158 r->WriteMask = WRITEMASK_XYZW;
2178 r->WriteMask = WRITEMASK_XYZW;
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| H A D | prog_to_nir.c | 282 ptn_move_dest_masked(b, dest, def, WRITEMASK_XYZW); in ptn_move_dest()
904 WRITEMASK_XYZW); in setup_registers_and_variables()
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| H A D | prog_print.c | 497 if (writeMask == WRITEMASK_XYZW) in _mesa_writemask_string()
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_vec4_cmod_propagation.cpp | 43 earlier->dst.writemask != WRITEMASK_XYZW) || in writemasks_incompatible()
44 (earlier->dst.writemask == WRITEMASK_XYZW && in writemasks_incompatible()
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| H A D | brw_reg.h | 456 WRITEMASK_XYZW);
473 WRITEMASK_XYZW);
490 WRITEMASK_XYZW);
859 WRITEMASK_XYZW); /* NOTE! */
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| H A D | test_vec4_dead_code_eliminate.cpp | 174 EXPECT_EQ(test_cmp->dst.writemask, WRITEMASK_XYZW); in TEST_F()
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| H A D | brw_vec4_copy_propagation.cpp | 139 WRITEMASK_XYZW)); in try_constant_propagate()
314 WRITEMASK_XYZW)); in try_copy_propagate()
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| H A D | brw_vec4.cpp | 89 this->writemask = WRITEMASK_XYZW; in init()
421 inst->dst.writemask != WRITEMASK_XYZW && in opt_vector_float()
871 if (!can_do_writemask(devinfo) && dst_writemask != WRITEMASK_XYZW) in can_reswizzle()
1384 if (inst->dst.writemask != WRITEMASK_XYZW) { in dump_instruction()
1659 WRITEMASK_XYZW)); in get_timestamp()
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| H A D | test_vec4_register_coalesce.cpp | 168 m1.writemask = WRITEMASK_XYZW; in TEST_F()
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| H A D | brw_vec4_builder.h | 617 inst->dst.writemask != WRITEMASK_XYZW) { in fix_math_instruction()
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| H A D | brw_nir.c | 1627 .write_mask = WRITEMASK_XYZW); in brw_nir_create_passthrough_tcs()
1640 .write_mask = WRITEMASK_XYZW); in brw_nir_create_passthrough_tcs()
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| H A D | brw_mesh.cpp | 577 .write_mask = WRITEMASK_XYZW, in brw_nir_initialize_mue()
598 .write_mask = WRITEMASK_XYZW, in brw_nir_initialize_mue()
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| H A D | brw_vec4_visitor.cpp | 342 if (devinfo->ver == 6 && dst.writemask != WRITEMASK_XYZW) { in emit_math()
710 this->writemask = WRITEMASK_XYZW; in dst_reg()
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| H A D | brw_vec4_generator.cpp | 62 assert(dst.writemask == WRITEMASK_XYZW); in generate_math_gfx6()
1411 assert(dst.writemask == WRITEMASK_XYZW); in generate_mov_indirect()
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| H A D | brw_vec4_nir.cpp | 606 dest.writemask = WRITEMASK_XYZW; in nir_emit_intrinsic()
2143 inst->dst.writemask = WRITEMASK_XYZW;
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| H A D | brw_eu_emit.c | 3169 const unsigned mask = align1 ? WRITEMASK_XYZW : WRITEMASK_X; in brw_untyped_atomic()
3219 const unsigned mask = !has_simd4x2 && !align1 ? WRITEMASK_X : WRITEMASK_XYZW; in brw_untyped_surface_write()
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| H A D | brw_fs_nir.cpp | 3073 if (mask != WRITEMASK_XYZW)
3086 unsigned(mask != WRITEMASK_XYZW);
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| H A D | brw_fs.cpp | 3357 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
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| /third_party/mesa3d/src/compiler/glsl/ |
| H A D | lower_distance.cpp | 420 ir->write_mask = WRITEMASK_XYZW; in fix_lhs()
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| /third_party/mesa3d/src/intel/tools/ |
| H A D | i965_gram.y | 106 WRITEMASK_XYZW);
1699 WRITEMASK_XYZW);
2124 $$ = WRITEMASK_XYZW;
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| /third_party/mesa3d/src/mesa/main/ |
| H A D | ffvertex_prog.c | 547 dst->WriteMask = mask ? mask : WRITEMASK_XYZW; in emit_dst()
1028 emit_op2(p, OPCODE_MAX, lit, WRITEMASK_XYZW, id, dots); in emit_degenerate_lit()
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