| /third_party/ffmpeg/libavcodec/alpha/ |
| H A D | simple_idct_alpha.c | 39 #define W5 12873 macro
105 b2 = W5 * t; in idct_row()
120 b3 -= W5 * t; in idct_row()
127 b0 += W5 * t; in idct_row()
137 b1 -= W5 * t; in idct_row()
189 b2 = W5 * col[8 * 1]; in idct_col()
202 b3 -= W5 * col[8 * 3]; in idct_col()
206 b0 += W5 * col[8 * 5]; in idct_col()
214 b1 -= W5 * col[8 * 7]; in idct_col()
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| /third_party/ffmpeg/libavcodec/ |
| H A D | simple_idct_template.c | 39 #undef W5 macro
54 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
72 #define W5 12873 // 51491 macro
95 #define W5 25746 macro
173 b2 = MUL(W5, row[1]);
176 MAC(b3, -W5, row[3]);
188 MAC(b0, W5, row[5]);
192 MAC(b1, -W5, row[7]);
224 b2 = MUL(W5, col[8*1]); \
230 MAC(b3, -W5, co
[all...] |
| H A D | wmv2dsp.c | 32 #define W5 1609 /* 2048*sqrt (2)*cos (5*pi/16) */ macro
44 a5 = W5 * b[5] + W3 * b[3]; in wmv2_idct_row()
45 a3 = W3 * b[5] - W5 * b[3]; in wmv2_idct_row()
74 a5 = (W5 * b[8 * 5] + W3 * b[8 * 3] + 4) >> 3; in wmv2_idct_col()
75 a3 = (W3 * b[8 * 5] - W5 * b[8 * 3] + 4) >> 3; in wmv2_idct_col()
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| /third_party/ffmpeg/libavcodec/mips/ |
| H A D | simple_idct_mmi.c | 35 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
45 W1, W3, W5, W7,
47 W3, -W7, -W1, -W5,
49 W5, -W1, W7, W3,
51 W7, -W5, W3, -W1,
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| H A D | wmv2dsp_mmi.c | 33 #define W5 1609 /* 2048*sqrt (2)*cos (5*pi/16) */ macro
46 a3 = W3 * b[5] - W5 * b[3]; in wmv2_idct_row_mmi()
48 a5 = W5 * b[5] + W3 * b[3]; in wmv2_idct_row_mmi()
76 a3 = (W3 * b[40] - W5 * b[24] + 4) >> 3; in wmv2_idct_col_mmi()
78 a5 = (W5 * b[40] + W3 * b[24] + 4) >> 3; in wmv2_idct_col_mmi()
|
| /third_party/ffmpeg/libavcodec/arm/ |
| H A D | simple_idct_arm.S | 33 #define W5 12873 define
94 @@ MUL16(b2, W5, row[1]);
99 @@ MAC16(b3, -W5, row[3]);
104 ldr r10, =W5 @ R10=W5
107 mul r5, r10, r7 @ R5=W5*ROWr16[1]=b2 (ROWr16[1] must be the second arg, to have the possibility to save 1 cycle)
116 mlane r7, r10, r2, r7 @ R7-=W5*ROWr16[3]=b3 (ROWr16[3] must be the second arg, to have the possibility to save 1 cycle)
119 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7,
127 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7,
129 @@ MAC16(b0, W5, ro
[all...] |
| H A D | simple_idct_armv6.S | 30 #define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */ define
41 #define W57 (W5 | (W7 << 16))
59 ldr r10,=W57 /* r10 = W5 | (W7 << 16) */
64 smusdx r11,r3, r10 /* r11 = B3 = W7*row[1] - W5*row[3] */
67 pkhbt r1, ip, r10,lsl #16 /* r1 = W1 | (W5 << 16) */
69 smlad r8, lr, r10,r8 /* B0 += W5*row[5] + W7*row[7] */
70 smusdx r10,r3, r1 /* r10 = B2 = W5*row[1] - W1*row[3] */
77 smlad r9, lr, r1, r9 /* B1 -= W1*row[5] + W5*row[7] */
96 ldr r10,=W57 /* r10 = W5 | (W7 << 16) */
103 smusdx r11,r3, r10 /* r11 = B3 = W7*row[1] - W5*ro
[all...] |
| H A D | simple_idct_neon.S | 32 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 define
55 vmull.s16 q5, d4, w5 /* q5 = W5 * col[1] */
63 vmlsl.s16 q6, d8, w5 /* q6 -= W5 * col[3] */
101 vmlal.s16 q9, d5, w5 /* q9 += W5 * col[5] */
185 vmlal.s16 q9, d5, w5 /* q9 += W5 * col[5] */
247 .short W1, W2, W3, W4, W5, W6, W7, W4c
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| H A D | simple_idct_armv5te.S | 30 #define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */ define
38 #define W57 (W5 | (W7 << 16))
64 ldr lr, =W57 /* lr = W5 | (W7 << 16) */
|
| /third_party/typescript/tests/baselines/reference/ |
| H A D | constEnums.js | 38 W5 = Enum1[`V`],
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 112 BPF::W0, BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 36 case AArch64::X5: return AArch64::W5; in getWRegFromXReg()
76 case AArch64::W5: return AArch64::X5; in getXRegFromWReg()
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| /third_party/ffmpeg/libavcodec/x86/ |
| H A D | simple_idct10.asm | 54 %define W5sh2 12873 ; W5 = 51491 = 12873<<2 - 1
|
| /third_party/ffmpeg/libavcodec/ppc/ |
| H A D | fdctdsp.c | 53 #define W5 (M_SQRT2 * (C1 + C3 - C5 + C7)) macro
63 { W4, W5, W6, W7 },
125 b5 = vec_madd(cnst, x5, x1); /* b5 = x5 * W5 + x1; */ \
182 b5 = vec_madd(cnst, x5, x1); /* b5 = x5 * W5 + x1; */ \
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 74 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0 in getCallerSavedRegs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 70 {codeview::RegisterId::ARM64_W5, AArch64::W5}, in initLLVMToCVRegMapping()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 607 Hexagon::W4, Hexagon::W5, Hexagon::W6, Hexagon::W7, in DecodeHvxWRRegisterClass()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 463 AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9,
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 3008 AArch64::W5, AArch64::W6, AArch64::W7 }, in fastLowerArguments()
|