Searched refs:VREV64 (Results 1 - 3 of 3) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 194 VREV64, // reverse elements within 64-bit doublewords
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H A D | ARMISelLowering.cpp | 1644 case ARMISD::VREV64: return "ARMISD::VREV64"; in getTargetNodeName() 5817 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op)); in ExpandBITCAST() 6253 SDValue Reversed = DAG.getNode(ARMISD::VREV64, dl, SplitVT, Cmp); in LowerVSETCC() 7692 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle() 7755 OpLHS = DAG.getNode(ARMISD::VREV64, DL, VT, OpLHS); in LowerReverse_VECTOR_SHUFFLEv16i8_v8i16() 7996 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE() 14827 // VREV64.8) pair and get the same effect. This will likely be better than in allowsMisalignedMemoryAccesses()
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/third_party/node/deps/v8/src/codegen/arm/ |
H A D | assembler-arm.cc | 4056 VREV64, enumerator 4121 case VREV64: in EncodeNeonUnaryOp() 5021 emit(EncodeNeonUnaryOp(VREV64, NEON_Q, size, dst.code(), src.code())); in vrev64()
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