| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_opcodes.py | 74 VOPC = 1 << 10 variable in Format
862 # VOPC instructions:
873 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, cls, True, False)
879 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, InstrClass.Valu32, True, False)
881 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, InstrClass.Valu32, True, False)
883 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, InstrClass.Valu32, True, False)
885 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, InstrClass.Valu32, True, False)
889 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, InstrClass.Valu32, True, False)
891 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, InstrClass.Valu32, True, False)
893 opcode(name, gfx7, gfx9, gfx10, Format.VOPC, InstrClas
[all...] |
| H A D | aco_validate.cpp | 125 else if ((uint32_t)base_format & (uint32_t)Format::VOPC) in validate_ir()
126 base_format = Format::VOPC; in validate_ir()
146 base_format == Format::VOPC || base_format == Format::VINTRP, in validate_ir()
153 base_format == Format::VOPC, in validate_ir()
162 if (base_format == Format::VOPC) { in validate_ir()
164 "SDWA VOPC clamp only supported on GFX8", instr.get()); in validate_ir()
167 "SDWA+VOPC definition must be fixed to vcc on GFX8", instr.get()); in validate_ir()
|
| H A D | aco_optimizer.cpp | 1212 /* Remove superfluous s_and when the VOPC instruction uses the same exec and thus in can_eliminate_and_exec()
1857 if (instr->format == Format::VOPC && /* don't optimize VOP3 / SDWA / DPP */ in label_instruction()
2170 create_instruction<VOP3_instruction>(new_op, asVOP3(Format::VOPC), 2, 1); in combine_ordering_test()
2178 new_instr = create_instruction<VOPC_instruction>(new_op, Format::VOPC, 2, 1); in combine_ordering_test()
2243 create_instruction<VOP3_instruction>(new_op, asVOP3(Format::VOPC), 2, 1); in combine_comparison_ordering()
2252 new_instr = create_instruction<VOPC_instruction>(new_op, Format::VOPC, 2, 1); in combine_comparison_ordering()
2368 create_instruction<VOP3_instruction>(new_op, asVOP3(Format::VOPC), 2, 1); in combine_constant_comparison_ordering()
2377 new_instr = create_instruction<VOPC_instruction>(new_op, Format::VOPC, 2, 1); in combine_constant_comparison_ordering()
2419 create_instruction<VOP3_instruction>(new_opcode, asVOP3(Format::VOPC), 2, 1); in combine_inverse_comparison()
2429 new_opcode, (Format)((uint16_t)Format::SDWA | (uint16_t)Format::VOPC), in combine_inverse_comparison()
[all...] |
| H A D | aco_ir.h | 65 * (*) The same is applicable for VOP1 and VOPC instructions.
100 VOPC = 1 << 10, member in aco::Format
291 assert(format == Format::VOP1 || format == Format::VOP2 || format == Format::VOPC); in asSDWA()
1280 constexpr bool isVOPC() const noexcept { return (uint16_t)format & (uint16_t)Format::VOPC; }
1438 * This format can be used for VOP1, VOP2 or VOPC instructions.
1509 * This format can be used for VOP1, VOP2 or VOPC instructions.
1511 * omod and SGPR/constant operands are only available on GFX9+. For VOPC,
1516 /* these destination modifiers aren't available with VOPC except for
|
| H A D | aco_assembler.cpp | 292 case Format::VOPC: { in emit_instruction()
|
| H A D | aco_register_allocation.cpp | 3011 ((instr->format == Format::VOPC && !(instr->definitions[0].physReg() == vcc)) || in register_allocation()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 34 VOPC = 1 << 9,
|
| H A D | SIInstrInfo.h | 438 return MI.getDesc().TSFlags & SIInstrFlags::VOPC; in isVOPC()
442 return get(Opcode).TSFlags & SIInstrFlags::VOPC; in isVOPC()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2819 (SIInstrFlags::VOPC | in validateConstantBusLimitations()
3260 if ((Desc.TSFlags & (VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA)) == 0) in validateLdsDirect()
6867 cvtSDWA(Inst, Operands, SIInstrFlags::VOPC, isVI());
6900 } else if (BasicInstType == SIInstrFlags::VOPC &&
6943 case SIInstrFlags::VOPC:
6951 llvm_unreachable("Invalid instruction type. Only VOP1, VOP2 and VOPC allowed");
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 505 // Print default vcc/vcc_lo operand of VOPC. in printOperand()
507 if (OpNo == 0 && (Desc.TSFlags & SIInstrFlags::VOPC) && in printOperand()
|