Home
last modified time | relevance | path

Searched refs:VIC_CACHE_WIDTH_64Bx4 (Results 1 - 4 of 4) sorted by relevance

/third_party/libdrm/tests/tegra/
H A Dvic.h88 #define VIC_CACHE_WIDTH_64Bx4 2 /* BL16Bx2, PL */ macro
H A Dvic41.c144 surface->SlotCacheWidth = VIC_CACHE_WIDTH_64Bx4; /* XXX */ in vic41_blit()
214 surface->SlotCacheWidth = VIC_CACHE_WIDTH_64Bx4; /* XXX */ in vic41_flip()
H A Dvic42.c144 surface->SlotCacheWidth = VIC_CACHE_WIDTH_64Bx4; /* XXX */ in vic42_blit()
214 surface->SlotCacheWidth = VIC_CACHE_WIDTH_64Bx4; /* XXX */ in vic42_flip()
H A Dvic40.c144 surface->SlotCacheWidth = VIC_CACHE_WIDTH_64Bx4; /* XXX */ in vic40_blit()
214 surface->SlotCacheWidth = VIC_CACHE_WIDTH_64Bx4; /* XXX */ in vic40_flip()

Completed in 4 milliseconds