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Searched refs:VA (Results 1 - 25 of 59) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp27 bool MipsCallLowering::MipsHandler::assign(Register VReg, const CCValAssign &VA, in assign() argument
29 if (VA.isRegLoc()) { in assign()
30 assignValueToReg(VReg, VA, VT); in assign()
31 } else if (VA.isMemLoc()) { in assign()
32 assignValueToAddress(VReg, VA); in assign()
96 void assignValueToReg(Register ValVReg, const CCValAssign &VA,
99 Register getStackAddress(const CCValAssign &VA,
102 void assignValueToAddress(Register ValVReg, const CCValAssign &VA) override;
113 void buildLoad(Register Val, const CCValAssign &VA) { in buildLoad() argument
115 Register Addr = getStackAddress(VA, MM in buildLoad()
136 assignValueToReg(Register ValVReg, const CCValAssign &VA, const EVT &VT) assignValueToReg() argument
180 getStackAddress(const CCValAssign &VA, MachineMemOperand *&MMO) getStackAddress() argument
201 assignValueToAddress(Register ValVReg, const CCValAssign &VA) assignValueToAddress() argument
250 assignValueToReg(Register ValVReg, const CCValAssign &VA, const EVT &VT) assignValueToReg() argument
287 getStackAddress(const CCValAssign &VA, MachineMemOperand *&MMO) getStackAddress() argument
313 assignValueToAddress(Register ValVReg, const CCValAssign &VA) assignValueToAddress() argument
321 extendRegister(Register ValReg, const CCValAssign &VA) extendRegister() argument
400 const CCValAssign &VA = ArgLocs[i]; setLocInfo() local
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H A DMipsCallLowering.h46 bool assign(Register VReg, const CCValAssign &VA, const EVT &VT);
48 virtual Register getStackAddress(const CCValAssign &VA,
51 virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA,
55 const CCValAssign &VA) = 0;
H A DMipsFastISel.cpp1156 CCValAssign &VA = ArgLocs[i]; in processCallArgs() local
1157 const Value *ArgVal = CLI.OutVals[VA.getValNo()]; in processCallArgs()
1158 MVT ArgVT = OutVTs[VA.getValNo()]; in processCallArgs()
1163 VA.convertToReg(Mips::F12); in processCallArgs()
1166 VA.convertToReg(Mips::D6_64); in processCallArgs()
1168 VA.convertToReg(Mips::D6); in processCallArgs()
1173 VA.convertToReg(Mips::F14); in processCallArgs()
1176 VA.convertToReg(Mips::D7_64); in processCallArgs()
1178 VA.convertToReg(Mips::D7); in processCallArgs()
1184 VA in processCallArgs()
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H A DMipsISelLowering.cpp3255 CCValAssign &VA = ArgLocs[i]; in LowerCall() local
3256 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
3273 VA); in LowerCall()
3279 switch (VA.getLocInfo()) { in LowerCall()
3283 if (VA.isRegLoc()) { in LowerCall()
3295 Register LocRegLo = VA.getLocReg(); in LowerCall()
3328 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
3330 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
3331 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA in LowerCall()
3481 CCValAssign &VA = RVLocs[i]; LowerCallResult() local
3531 UnpackFromArgumentSlot(SDValue Val, const CCValAssign &VA, EVT ArgVT, const SDLoc &DL, SelectionDAG &DAG) UnpackFromArgumentSlot() argument
3624 CCValAssign &VA = ArgLocs[i]; LowerFormalArguments() local
3798 CCValAssign &VA = RVLocs[i]; LowerReturn() local
4303 copyByValRegs( SDValue Chain, const SDLoc &DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, const CCValAssign &VA, MipsCCState &State) const copyByValRegs() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp116 CCValAssign &VA) override {
117 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg");
118 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?");
120 assert(VA.getValVT().getSizeInBits() <= 64 && "Unsupported value size");
121 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size");
123 Register ExtReg = extendRegister(ValVReg, VA);
129 MachinePointerInfo &MPO, CCValAssign &VA) override {
133 Register ExtReg = extendRegister(ValVReg, VA);
135 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(),
144 CCValAssign VA variable
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H A DARMFastISel.cpp1903 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1904 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
1911 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1913 } else if (VA.needsCustom()) { in ProcessCallArgs()
1915 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1917 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1953 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1954 const Value *ArgVal = Args[VA.getValNo()]; in ProcessCallArgs()
1955 Register Arg = ArgRegs[VA in ProcessCallArgs()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp292 CCValAssign &VA = ArgLocs[j]; in handleAssignments()
293 assert(VA.getValNo() == i && "Location doesn't correspond to current arg"); in handleAssignments()
295 if (VA.needsCustom()) { in handleAssignments()
304 MVT VAVT = VA.getValVT(); in handleAssignments()
305 if (VA.isRegLoc()) { in handleAssignments()
317 VA = ArgLocs[j + Part]; in handleAssignments()
318 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA); in handleAssignments()
329 Handler.assignValueToReg(NewReg, VA.getLocReg(), VA); in handleAssignments()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp234 CCValAssign &VA = RVLocs[i]; in LowerReturn_32() local
235 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn_32()
239 if (VA.needsCustom()) { in LowerReturn_32()
240 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
251 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag); in LowerReturn_32()
253 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
254 VA = RVLocs[++i]; // skip ahead to next loc in LowerReturn_32()
255 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1, in LowerReturn_32()
258 Chain = DAG.getCopyToReg(Chain, DL, VA in LowerReturn_32()
317 CCValAssign &VA = RVLocs[i]; LowerReturn_64() local
402 CCValAssign &VA = ArgLocs[i]; LowerFormalArguments_32() local
594 CCValAssign &VA = ArgLocs[i]; LowerFormalArguments_64() local
788 CCValAssign &VA = ArgLocs[i]; LowerCall_32() local
1049 const CCValAssign &VA = ArgLocs[i]; fixupVariableFloatArgs() local
1302 CCValAssign &VA = RVLocs[i]; global() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp263 CCValAssign &VA = ArgLocs[i]; in LowerCall() local
267 switch (VA.getLocInfo()) { in LowerCall()
273 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
276 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
279 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
285 if (VA.isRegLoc()) { in LowerCall()
286 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
288 assert(VA.isMemLoc() && "Must be register or memory argument."); in LowerCall()
293 SDValue SOffset = DAG.getIntPtrConstant(VA.getLocMemOffset(), dl); in LowerCall()
377 const CCValAssign &VA in lowerCallResult() local
480 CCValAssign &VA = ArgLocs[i]; LowerCallArguments() local
632 CCValAssign &VA = RVLocs[i]; LowerReturn() local
660 CCValAssign &VA = RVLocs[i]; LowerReturn() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp226 for (auto &VA : ArgLocs) { in LowerFormalArguments()
227 if (VA.isRegLoc()) { in LowerFormalArguments()
229 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
241 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerFormalArguments()
246 if (VA.getLocInfo() == CCValAssign::SExt) in LowerFormalArguments()
248 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
249 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerFormalArguments()
251 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
253 if (VA.getLocInfo() != CCValAssign::Full) in LowerFormalArguments()
254 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA in LowerFormalArguments()
327 CCValAssign &VA = ArgLocs[i]; LowerCall() local
434 CCValAssign &VA = RVLocs[i]; LowerReturn() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86CallLowering.cpp125 CCValAssign &VA) override {
137 unsigned ValSize = VA.getValVT().getSizeInBits();
138 unsigned LocSize = VA.getLocVT().getSizeInBits();
144 ExtReg = extendRegister(ValVReg, VA);
150 MachinePointerInfo &MPO, CCValAssign &VA) override {
151 Register ExtReg = extendRegister(ValVReg, VA);
153 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(),
250 MachinePointerInfo &MPO, CCValAssign &VA) override {
258 CCValAssign &VA) override {
261 switch (VA
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H A DX86FastISel.cpp1207 CCValAssign &VA = ValLocs[0]; in X86SelectRet()
1210 if (VA.getLocInfo() != CCValAssign::Full) in X86SelectRet()
1213 if (!VA.isRegLoc()) in X86SelectRet()
1218 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) in X86SelectRet()
1221 unsigned SrcReg = Reg + VA.getValNo(); in X86SelectRet()
1223 EVT DstVT = VA.getValVT(); in X86SelectRet()
1247 Register DstReg = VA.getLocReg(); in X86SelectRet()
1256 RetRegs.push_back(VA.getLocReg()); in X86SelectRet()
3320 CCValAssign const &VA in fastLowerCall() local
3554 CCValAssign &VA = RVLocs[i]; fastLowerCall() local
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1577 CCValAssign VA = PendingLocs[0]; in CC_RISCV() local
1581 return CC_RISCVAssign2XLen(XLen, State, VA, AF, ValNo, ValVT, LocVT, in CC_RISCV()
1680 const CCValAssign &VA, const SDLoc &DL) { in convertLocVTToValVT()
1681 switch (VA.getLocInfo()) { in convertLocVTToValVT()
1687 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) { in convertLocVTToValVT()
1691 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); in convertLocVTToValVT()
1700 const CCValAssign &VA, const SDLoc &DL) { in unpackFromRegLoc()
1703 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
1723 RegInfo.addLiveIn(VA in unpackFromRegLoc()
1679 convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) convertLocVTToValVT() argument
1699 unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) unpackFromRegLoc() argument
1732 convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) convertValVTToLocVT() argument
1754 unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) unpackFromMemLoc() argument
1782 unpackF64OnRV32DSoftABI(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) unpackF64OnRV32DSoftABI() argument
1922 CCValAssign &VA = ArgLocs[i]; LowerFormalArguments() local
2165 CCValAssign &VA = ArgLocs[i]; LowerCall() local
2410 CCValAssign &VA = RVLocs[i]; LowerReturn() local
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp640 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments() local
641 if (VA.isRegLoc()) { in LowerCCCArguments()
643 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
655 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
661 if (VA.getLocInfo() == CCValAssign::SExt) in LowerCCCArguments()
663 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
664 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerCCCArguments()
666 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
668 if (VA.getLocInfo() != CCValAssign::Full) in LowerCCCArguments()
669 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA in LowerCCCArguments()
762 CCValAssign &VA = RVLocs[i]; LowerReturn() local
828 CCValAssign &VA = ArgLocs[i]; LowerCCCCallTo() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp457 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments() local
458 if (VA.isRegLoc()) { in LowerCCCArguments()
460 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
464 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
470 if (VA.getLocInfo() == CCValAssign::SExt) in LowerCCCArguments()
472 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
473 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerCCCArguments()
475 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
477 if (VA.getLocInfo() != CCValAssign::Full) in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA in LowerCCCArguments()
554 CCValAssign &VA = RVLocs[i]; LowerReturn() local
658 CCValAssign &VA = ArgLocs[I]; LowerCCCCallTo() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1068 const CCValAssign &VA = RVLocs[i]; in LowerCallResult() local
1069 if (VA.isRegLoc()) { in LowerCallResult()
1070 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(), in LowerCallResult()
1075 assert(VA.isMemLoc()); in LowerCallResult()
1076 ResultMemLocs.push_back(std::make_pair(VA.getLocMemOffset(), in LowerCallResult()
1143 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo() local
1147 switch (VA.getLocInfo()) { in LowerCCCCallTo()
1151 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1154 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA in LowerCCCCallTo()
1297 CCValAssign &VA = ArgLocs[i]; LowerCCCArguments() local
1470 CCValAssign &VA = RVLocs[i]; LowerReturn() local
1498 CCValAssign &VA = RVLocs[i]; LowerReturn() local
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/third_party/skia/src/sfnt/
H A DSkOTTable_OS_2.h31 struct VA : SkOTTableOS2_VA { } vA; struct
45 static_assert(sizeof(SkOTTableOS2::Version::VA) == 68, "sizeof_SkOTTableOS2__VA_not_68");
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1066 for (CCValAssign &VA : ArgLocs) { in LowerFormalArguments()
1069 if (VA.isRegLoc()) { in LowerFormalArguments()
1070 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1080 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments()
1089 switch (VA.getLocInfo()) { in LowerFormalArguments()
1095 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1099 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
1100 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1104 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
1105 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA in LowerFormalArguments()
1198 CCValAssign &VA = ArgLocs[AI]; LowerCall() local
1241 CCValAssign &VA = ArgLocs[Loc]; LowerCall() local
1401 CCValAssign &VA = RVLocs[i]; LowerReturn() local
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1393 CCValAssign &VA = ArgLocs[I]; in processCallArgs() local
1394 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1399 !VA.isRegLoc() || VA.needsCustom()) in processCallArgs()
1403 if (VA.getLocInfo() == CCValAssign::BCvt) in processCallArgs()
1431 CCValAssign &VA = ArgLocs[I]; in processCallArgs() local
1432 unsigned Arg = ArgRegs[VA.getValNo()]; in processCallArgs()
1433 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1436 switch (VA.getLocInfo()) { in processCallArgs()
1442 MVT DestVT = VA in processCallArgs()
1505 CCValAssign &VA = RVLocs[0]; finishCall() local
1718 CCValAssign &VA = ValLocs[0]; SelectRet() local
1742 CCValAssign &VA = ValLocs[i]; SelectRet() local
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp48 MachinePointerInfo &MPO, CCValAssign &VA) override {
53 CCValAssign &VA) override {
55 if (VA.getLocVT().getSizeInBits() < 32) {
60 ExtReg = extendRegister(ValVReg, VA);
95 CCValAssign &VA) override {
98 if (VA.getLocVT().getSizeInBits() < 32) {
106 switch (VA.getLocInfo()) {
110 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg);
121 MachinePointerInfo &MPO, CCValAssign &VA) override {
/third_party/mksh/
H A Dshf.c802 #define VA(type) va_arg(args, type) in shf_vfprintf() macro
851 tmp = VA(int); in shf_vfprintf()
914 lnum = (long)VA(ssize_t); in shf_vfprintf()
916 lnum = VA(long); in shf_vfprintf()
918 lnum = (long)(short)VA(int); in shf_vfprintf()
920 lnum = (long)VA(int); in shf_vfprintf()
927 lnum = VA(size_t); in shf_vfprintf()
929 lnum = VA(unsigned long); in shf_vfprintf()
931 lnum = (unsigned long)(unsigned short)VA(int); in shf_vfprintf()
933 lnum = (unsigned long)VA(unsigne in shf_vfprintf()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h135 CCValAssign &VA) = 0;
142 CCValAssign &VA) = 0;
155 Register extendRegister(Register ValReg, CCValAssign &VA);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/PDB/DIA/
H A DDIARawSymbol.h38 uint64_t VA) const override;
48 findInlineFramesByVA(uint64_t VA) const override;
57 findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/PDB/
H A DIPDBRawSymbol.h68 uint64_t VA) const = 0;
78 findInlineFramesByVA(uint64_t VA) const = 0;
87 findInlineeLinesByVA(uint64_t VA, uint32_t Length) const = 0;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/PDB/Native/
H A DNativeRawSymbol.h43 uint64_t VA) const override;
53 findInlineFramesByVA(uint64_t VA) const override;
62 findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;

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