| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 631 __ abs(v31.V8B(), v5.V8B()); in GenerateTestSequenceNEON()
639 __ add(v13.V8B(), v7.V8B(), v18.V8B()); in GenerateTestSequenceNEON()
643 __ addhn(v31.V8B(), v12.V8H(), v22.V8H()); in GenerateTestSequenceNEON()
653 __ addp(v12.V8B(), v26.V8B(), v7.V8B()); in GenerateTestSequenceNEON()
656 __ addv(b12, v20.V8B()); in GenerateTestSequenceNEON()
[all...] |
| H A D | test-cpu-features-aarch64.cc | 756 TEST_NEON(abs_0, abs(v0.V8B(), v1.V8B()))
764 TEST_NEON(addhn_0, addhn(v0.V8B(), v1.V8H(), v2.V8H()))
771 TEST_NEON(addp_1, addp(v0.V8B(), v1.V8B(), v2.V8B()))
778 TEST_NEON(addv_0, addv(b0, v1.V8B()))
783 TEST_NEON(add_0, add(v0.V8B(), v1.V8B(), v2.V8B()))
[all...] |
| H A D | test-disasm-neon-aarch64.cc | 305 V(V8B(), "8b") \
314 V(V4H(), "4h", V8B(), "8b") \
322 V(V8H(), "8h", V8B(), "8b") \
332 V(V8B(), "8b") \
391 COMPARE_MACRO(Ld1(v0.V8B(), MemOperand(x15, 8, PostIndex)), in TEST()
507 COMPARE_MACRO(St1(v0.V8B(), MemOperand(x15, 8, PostIndex)), in TEST()
660 COMPARE_MACRO(Ld1(v0.V8B(), 0, MemOperand(x15)), "ld1 {v0.b}[0], [x15]"); in TEST()
675 COMPARE_MACRO(Ld1(v0.V8B(), 0, MemOperand(x15, x0, PostIndex)), in TEST()
708 COMPARE_MACRO(Ld2(v0.V8B(), v1.V8B(), in TEST()
[all...] |
| H A D | test-assembler-neon-aarch64.cc | 311 __ Ld1(v2.V8B(), MemOperand(x17)); in TEST()
313 __ Ld1(v3.V8B(), v4.V8B(), MemOperand(x17)); in TEST()
367 __ Ld1(v2.V8B(), MemOperand(x17, x23, PostIndex)); in TEST()
368 __ Ld1(v3.V8B(), v4.V8B(), MemOperand(x18, 16, PostIndex)); in TEST()
592 __ Ld2(v2.V8B(), v3.V8B(), MemOperand(x17)); in TEST()
594 __ Ld2(v4.V8B(), v5.V8B(), MemOperan in TEST()
[all...] |
| H A D | test-api-aarch64.cc | 264 VIXL_CHECK(VRegister(4, kDRegSize, 8).Is(v4.V8B())); in TEST()
276 VIXL_CHECK(VRegister(4, kFormat8B).Is(v4.V8B())); in TEST()
1462 temps.Include(VRegister(v5.V8B())); in TEST()
1498 temps.Exclude(VRegister(v5.V8B())); in TEST()
1534 temps.Release(VRegister(v5.V8B())); in TEST()
|
| H A D | test-simulator-aarch64.cc | 1704 VRegister vn_ext = (kDRegSize == vn_bits) ? vn.V8B() : vn.V16B(); in Test1OpAcrossNEON_Helper()
1705 VRegister vntmp_ext = (kDRegSize == vn_bits) ? vntmp.V8B() : vntmp.V16B(); in Test1OpAcrossNEON_Helper()
2671 VRegister vn_ext = (kDRegSize == vn_bits) ? vn.V8B() : vn.V16B(); in TestOpImmOpImmNEON_Helper()
2672 VRegister vntmp_ext = (kDRegSize == vn_bits) ? vntmp.V8B() : vntmp.V16B(); in TestOpImmOpImmNEON_Helper()
|
| H A D | test-assembler-sve-aarch64.cc | 329 __ Dup(v13.V8B(), b13, kDRegSizeInBytes);
330 __ Uaddl(v14.V8H(), v14.V8B(), v14.V8B());
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | register-arm64.h | 342 VRegister V8B() const { in V8B() function in v8::internal::VRegister
|
| H A D | assembler-arm64.cc | 3201 orr(vd.V8B(), vn.V8B(), vn.V8B()); in mov()
3242 not_(vd.V8B(), vn.V8B()); in mvn()
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| H A D | macro-assembler-arm64.cc | 416 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1); in Movi16bitHelper()
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| /third_party/vixl/src/aarch64/ |
| H A D | registers-aarch64.h | 604 inline VRegister V8B() const;
|
| H A D | assembler-aarch64.cc | 4522 orr(vd.V8B(), vn.V8B(), vn.V8B());
4575 not_(vd.V8B(), vn.V8B());
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| H A D | macro-assembler-aarch64.cc | 1029 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1); in Emit()
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| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 1685 Sxtl(dst.fp().V8H(), dst.fp().V8B()); in LoadTransform()
1688 Uxtl(dst.fp().V8H(), dst.fp().V8B()); in LoadTransform()
2949 Sqxtn(dst.fp().V8B(), lhs.fp().V8H()); in emit_i8x16_bitmask()
2963 Sqxtun(dst.fp().V8B(), lhs.fp().V8H()); in emit_i8x16_bitmask()
2997 Sxtl(dst.fp().V8H(), src.fp().V8B()); in emit_i8x16_bitmask()
3007 Uxtl(dst.fp().V8H(), src.fp().V8B()); in emit_i8x16_bitmask()
3088 Smull(dst.fp().V8H(), src1.fp().V8B(), src2.fp().V8B()); in emit_i8x16_bitmask()
3094 Umull(dst.fp().V8H(), src1.fp().V8B(), src2.fp().V8B()); in emit_i8x16_bitmask()
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 2584 __ Sqxtn(dst.V8B(), src0.V8H()); in AssembleArchInstruction()
2602 __ Sqxtun(dst.V8B(), src0.V8H()); in AssembleArchInstruction()
2791 __ Ldr(i.OutputSimd128Register().V8B(), i.MemoryOperand(0)); in AssembleArchInstruction()
2792 __ Sxtl(i.OutputSimd128Register().V8H(), i.OutputSimd128Register().V8B()); in AssembleArchInstruction()
2797 __ Ldr(i.OutputSimd128Register().V8B(), i.MemoryOperand(0)); in AssembleArchInstruction()
2798 __ Uxtl(i.OutputSimd128Register().V8H(), i.OutputSimd128Register().V8B()); in AssembleArchInstruction()
|