| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 40 UXTB, enumerator
60 case AArch64_AM::UXTB: return "uxtb"; in getShiftExtendName()
127 case 0: return AArch64_AM::UXTB; in getExtendType()
154 case AArch64_AM::UXTB: return 0; break; in getExtendEncoding()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 457 UXTB, enumerator
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| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-aarch64.cc | 81 COMPARE_MACRO(Mov(w10, Operand(w11, UXTB)), "uxtb w10, w11"); in TEST()
82 COMPARE_MACRO(Mov(x12, Operand(x13, UXTB, 1)), "ubfiz x12, x13, #1, #8"); in TEST()
332 COMPARE(add(w0, w1, Operand(w2, UXTB)), "add w0, w1, w2, uxtb"); in TEST()
333 COMPARE(adds(x3, x4, Operand(w5, UXTB, 1)), "adds x3, x4, w5, uxtb #1"); in TEST()
342 COMPARE(cmn(w0, Operand(w1, UXTB, 2)), "cmn w0, w1, uxtb #2"); in TEST()
345 COMPARE(add(w0, wsp, Operand(w1, UXTB)), "add w0, wsp, w1, uxtb"); in TEST()
358 COMPARE(sub(w0, w1, Operand(w2, UXTB)), "sub w0, w1, w2, uxtb"); in TEST()
359 COMPARE(subs(x3, x4, Operand(w5, UXTB, 1)), "subs x3, x4, w5, uxtb #1"); in TEST()
371 COMPARE(sub(w0, wsp, Operand(w1, UXTB)), "sub w0, wsp, w1, uxtb"); in TEST()
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| H A D | test-assembler-aarch64.cc | 188 __ Mvn(w10, Operand(w2, UXTB)); in TEST()
362 __ Mov(w23, Operand(w13, UXTB)); in TEST()
416 __ Mov(w19, Operand(w11, UXTB, 1)); in TEST()
497 __ Orr(w6, w0, Operand(w1, UXTB)); in TEST()
591 __ Orn(w6, w0, Operand(w1, UXTB)); in TEST()
658 __ And(w6, w0, Operand(w1, UXTB)); in TEST()
804 __ Bic(w6, w0, Operand(w1, UXTB)); in TEST()
936 __ Eor(w6, w0, Operand(w1, UXTB)); in TEST()
1003 __ Eon(w6, w0, Operand(w1, UXTB)); in TEST()
4995 __ Add(x10, x0, Operand(x1, UXTB,
[all...] |
| H A D | test-api-aarch64.cc | 1006 VIXL_CHECK(!Operand(w11, UXTB).IsPlainRegister()); in TEST()
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| H A D | test-cpu-features-aarch64.cc | 240 TEST_NONE(cmp_0, cmp(w0, Operand(w1, UXTB, 3)))
484 TEST_NONE(subs_2, subs(x0, x1, Operand(w2, UXTB, 3)))
491 TEST_NONE(sub_2, sub(x0, x1, Operand(w2, UXTB, 2)))
|
| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 126 return Operand(InputRegister32(index), UXTB); in InputOperand2_32()
156 return Operand(InputRegister64(index), UXTB); in InputOperand2_64()
2016 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrb, stlxrb, UXTB, in AssembleArchInstruction()
2021 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrb, stlxrb, UXTB, in AssembleArchInstruction()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 637 AArch64_AM::getArithExtendImm(AArch64_AM::UXTB, 0), in expandMI()
|
| H A D | AArch64ISelDAGToDAG.cpp | 509 return AArch64_AM::UXTB; in getExtendTypeForNode()
527 return !IsLoadStore ? AArch64_AM::UXTB : AArch64_AM::InvalidShiftExtend; in getExtendTypeForNode()
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| H A D | AArch64InstructionSelector.cpp | 4739 return AArch64_AM::UXTB;
4762 return !IsLoadStore ? AArch64_AM::UXTB : AArch64_AM::InvalidShiftExtend;
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| H A D | AArch64InstrInfo.cpp | 790 case AArch64_AM::UXTB: in isFalkorShiftExtFast()
824 case AArch64_AM::UXTB: in isFalkorShiftExtFast()
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| H A D | AArch64FastISel.cpp | 1173 ExtendType = IsZExt ? AArch64_AM::UXTB : AArch64_AM::SXTB; in emitAddSub()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 306 STORE_OPCODE(ZEXT8, UXTB); in OpcodeCache()
|
| H A D | ARMExpandPseudoInsts.cpp | 1907 ARM::UXTB, NextMBBI); in ExpandMI()
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| H A D | ARMFastISel.cpp | 2906 { { ARM::UXTB, ARM::t2UXTB }, 0, 1, MVT::i8 }
|
| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeARM_32.c | 146 #define UXTB 0xe6ef0070 macro
1456 return push_inst(compiler, (op == SLJIT_MOV_U8 ? UXTB : SXTB) | RD(dst) | RM(src2)); in emit_single_op()
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| H A D | sljitNativeARM_T2_32.c | 192 #define UXTB 0xb2c0 macro
815 return push_inst16(compiler, UXTB | RD3(dst) | RN3(arg2)); in emit_op_imm()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1251 return (ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB || in isExtend()
1264 return ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB || in isExtend64()
2750 .Case("uxtb", AArch64_AM::UXTB) in tryParseOptionalShiftExtend()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | constants-arm64.h | 371 UXTB = 0, enumerator
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| H A D | assembler-arm64.cc | 3899 case UXTB: in EmitExtendShift()
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| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 846 Cmp(result.gp().W(), Operand(expected.gp().W(), UXTB)); in AtomicCompareExchange()
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| /third_party/vixl/src/aarch64/ |
| H A D | constants-aarch64.h | 359 UXTB = 0, enumerator
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| H A D | assembler-aarch64.cc | 6229 case UXTB:
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| H A D | simulator-aarch64.cc | 1070 case UXTB: in Simulator()
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 1130 case UXTB:
|