Searched refs:TBZ (Results 1 - 9 of 9) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 175 TBZ,
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| H A D | AArch64ISelLowering.cpp | 1333 case AArch64ISD::TBZ: return "AArch64ISD::TBZ"; in getTargetNodeName()
5005 // See if we can use a TBZ to fold in an AND as well. in LowerBR_CC()
5006 // TBZ has a smaller branch displacement than CBZ. If the offset is in LowerBR_CC()
5014 return DAG.getNode(AArch64ISD::TBZ, dl, MVT::Other, Chain, Test, in LowerBR_CC()
5021 // See if we can use a TBZ to fold in an AND as well. in LowerBR_CC()
5022 // TBZ has a smaller branch displacement than CBZ. If the offset is in LowerBR_CC()
5051 return DAG.getNode(AArch64ISD::TBZ, dl, MVT::Other, Chain, LHS, in LowerBR_CC()
12081 // AArch64ISD::TBZ is matched during legalization.
12168 if (NewOpc == AArch64ISD::TBZ) in performTBZCombine()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | constants-arm64.h | 732 TBZ = TestBranchFixed | 0x00000000,
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| H A D | assembler-arm64.cc | 808 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbz()
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| /third_party/node/deps/v8/src/diagnostics/arm64/ |
| H A D | disasm-arm64.cc | 770 case TBZ: in VisitTestBranch()
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| /third_party/vixl/src/aarch64/ |
| H A D | constants-aarch64.h | 895 TBZ = TestBranchFixed | 0x00000000, enumerator
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| H A D | assembler-aarch64.cc | 423 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbz()
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| H A D | simulator-aarch64.cc | 3850 case TBZ: in Simulator()
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 1758 case TBZ:
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