| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.cc | 902 void TurboAssembler::Slt(Register rd, Register rs, const Operand& rt) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
975 Slt(rd, rs, rt); in CallRecordWriteStub()
2424 Slt(result, zero_reg, result); in CallRecordWriteStub()
2483 Slt(result, zero_reg, result); in CallRecordWriteStub()
3087 Slt(t9, rs, rt); in CallRecordWriteStub()
3765 Slt(scratch, GetRtAsRegisterHelper(rt, scratch), rs); in CallRecordWriteStub()
3775 Slt(scratch, rs, rt); in CallRecordWriteStub()
3785 Slt(scratch, rs, rt); in CallRecordWriteStub()
3795 Slt(scratch, GetRtAsRegisterHelper(rt, scratch), rs); in CallRecordWriteStub()
4012 Slt(scratc in CallRecordWriteStub()
[all...] |
| H A D | macro-assembler-mips64.h | 468 DEFINE_INSTRUCTION(Slt)
|
| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | macro-assembler-mips.cc | 769 void TurboAssembler::Slt(Register rd, Register rs, const Operand& rt) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
842 Slt(rd, rs, rt); in CallRecordWriteStub()
2418 Slt(t9, rs, rt); in CallRecordWriteStub()
3124 Slt(scratch, GetRtAsRegisterHelper(rt, scratch), rs); in CallRecordWriteStub()
3134 Slt(scratch, rs, rt); in CallRecordWriteStub()
3144 Slt(scratch, rs, rt); in CallRecordWriteStub()
3154 Slt(scratch, GetRtAsRegisterHelper(rt, scratch), rs); in CallRecordWriteStub()
3369 Slt(scratch, GetRtAsRegisterHelper(rt, scratch), rs); in CallRecordWriteStub()
3388 Slt(scratch, rs, rt); in CallRecordWriteStub()
3406 Slt(scratc in CallRecordWriteStub()
[all...] |
| H A D | macro-assembler-mips.h | 454 DEFINE_INSTRUCTION(Slt)
|
| /third_party/node/deps/v8/src/compiler/backend/loong64/ |
| H A D | code-generator-loong64.cc | 1378 __ Slt(output2, zero_reg, output2); in AssembleArchInstruction()
1399 __ Slt(output2, zero_reg, output2); in AssembleArchInstruction()
2086 __ Slt(result, left, right); in AssembleArchBoolean()
2095 __ Slt(result, left, right); in AssembleArchBoolean()
|
| /third_party/node/deps/v8/src/codegen/loong64/ |
| H A D | macro-assembler-loong64.cc | 693 void TurboAssembler::Slt(Register rd, Register rj, const Operand& rk) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
760 Slt(rd, rj, rk); in CallRecordWriteStub()
1703 Slt(result, zero_reg, result); in CallRecordWriteStub()
1762 Slt(result, zero_reg, result); in CallRecordWriteStub()
1967 Slt(t7, rj, rk); in CallRecordWriteStub()
|
| H A D | macro-assembler-loong64.h | 402 DEFINE_INSTRUCTION(Slt)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceInstMIPS32.h | 263 Slt, enumerator
1266 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>;
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| H A D | IceConverter.cpp | 439 Cond = Ice::InstIcmp::Slt; in convertICmpInstruction()
|
| H A D | IceTargetLoweringMIPS32.cpp | 3097 case InstIcmp::Slt: in lowerBr()
3264 case InstIcmp::Slt: { in lowerBr()
4209 case InstIcmp::Slt: { in lower64Icmp()
4352 case InstIcmp::Slt: { in lowerIcmp()
|
| H A D | WasmTranslator.cpp | 566 InstIcmp::create(Func, InstIcmp::Slt, TmpDest, Left, Right)); in Binop()
|
| H A D | IceTargetLoweringX8632.cpp | 3385 case InstIcmp::Slt: { in lowerIcmpVector()
3436 case InstIcmp::Slt: in lowerIcmp64()
3487 case InstIcmp::Slt: in lowerIcmp64()
|
| H A D | PNaClTranslator.cpp | 2008 Cond = Ice::InstIcmp::Slt; in convertNaClBitcICmpOpToIce()
|
| H A D | IceTargetLoweringX8664.cpp | 3083 case InstIcmp::Slt: { in lowerIcmpVector()
|
| /third_party/node/deps/v8/src/wasm/baseline/loong64/ |
| H A D | liftoff-assembler-loong64.h | 1339 TurboAssembler::Slt(kScratchReg2, kScratchReg, dst.gp()); in emit_type_conversion()
1421 TurboAssembler::Slt(kScratchReg2, kScratchReg, dst.gp()); in emit_type_conversion()
1452 TurboAssembler::Slt(kScratchReg2, kScratchReg, dst.gp()); in emit_type_conversion()
|
| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | code-generator-riscv64.cc | 3645 __ Slt(result, kScratchReg, zero_reg); in AssembleArchBoolean()
3698 __ Slt(result, left, right); in AssembleArchBoolean()
3707 __ Slt(result, left, right); in AssembleArchBoolean()
3751 __ Slt(result, left, right); in AssembleArchBoolean()
3759 __ Slt(result, zero_reg, left); in AssembleArchBoolean()
|
| /third_party/node/deps/v8/src/wasm/baseline/mips64/ |
| H A D | liftoff-assembler-mips64.h | 1483 TurboAssembler::Slt(kScratchReg2, kScratchReg, dst.gp()); in emit_type_conversion()
1565 TurboAssembler::Slt(kScratchReg2, kScratchReg, dst.gp()); in emit_type_conversion()
1596 TurboAssembler::Slt(kScratchReg2, kScratchReg, dst.gp()); in emit_type_conversion()
|
| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | code-generator-mips64.cc | 1517 __ Slt(result, zero_reg, result); in AssembleArchInstruction()
1538 __ Slt(result, zero_reg, result); in AssembleArchInstruction()
4030 __ Slt(result, left, right); in AssembleArchBoolean()
4039 __ Slt(result, left, right); in AssembleArchBoolean()
|
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | macro-assembler-riscv64.h | 453 DEFINE_INSTRUCTION(Slt)
|
| H A D | macro-assembler-riscv64.cc | 780 void TurboAssembler::Slt(Register rd, Register rs, const Operand& rt) { in Slt() function in v8::internal::TurboAssembler
843 Slt(rd, rs, rt); in Sge()
2476 Slt(rd, rs, rt); // rs < rt in CompareI()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | code-generator-mips.cc | 1467 __ Slt(kScratchReg2, kScratchReg, i.OutputRegister()); in AssembleArchInstruction()
3831 __ Slt(result, left, right); in AssembleArchBoolean()
3840 __ Slt(result, left, right); in AssembleArchBoolean()
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| /third_party/node/deps/v8/src/wasm/baseline/mips/ |
| H A D | liftoff-assembler-mips.h | 1399 TurboAssembler::Slt(kScratchReg2, kScratchReg, dst.gp()); in emit_type_conversion()
|
| /third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
| H A D | SubzeroReactor.cpp | 1787 return createIntCompare(Ice::InstIcmp::Slt, lhs, rhs);
|