| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | constants-arm.h | 227 enum ShiftOp { enum
234 // Use a special code to make the distinction. The RRX ShiftOp is only used
529 inline int ShiftValue() const { return static_cast<ShiftOp>(Bits(6, 5)); } in ShiftValue()
530 inline ShiftOp ShiftField() const { in ShiftField()
531 return static_cast<ShiftOp>(BitField(6, 5)); in ShiftField()
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| H A D | assembler-arm.h | 102 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
116 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
170 ShiftOp shift_op() const { return shift_op_; } in shift_op()
175 ShiftOp shift_op_;
207 explicit MemOperand(Register rn, Register rm, ShiftOp shift_op, int shift_imm,
238 ShiftOp shift_op_;
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| H A D | assembler-arm.cc | 362 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) { in Operand()
382 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) { in Operand()
419 MemOperand::MemOperand(Register rn, Register rm, ShiftOp shift_op, in MemOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 113 Variable *Index, ShiftKind ShiftOp = kNoShift, in create()
117 OperandARM32Mem(Func, Ty, Base, Index, ShiftOp, ShiftAmt, Mode); in create()
122 ShiftKind getShiftOp() const { return ShiftOp; } in getShiftOp()
154 ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode);
159 ShiftKind ShiftOp; member in Ice::ARM32::OperandARM32Mem
310 ShiftKind ShiftOp, Operand *ShiftAmt) { in create()
312 OperandARM32FlexReg(Func, Ty, Reg, ShiftOp, ShiftAmt); in create()
324 ShiftKind getShiftOp() const { return ShiftOp; } in getShiftOp()
329 OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp,
333 ShiftKind ShiftOp; member in Ice::ARM32::OperandARM32FlexReg
309 create(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp, Operand *ShiftAmt) create() argument
[all...] |
| H A D | IceInstARM32.cpp | 323 ShiftOp(kNoShift), ShiftAmt(0), Mode(Mode) { in OperandARM32Mem()
331 Variable *Index, ShiftKind ShiftOp, in OperandARM32Mem()
334 ShiftOp(ShiftOp), ShiftAmt(ShiftAmt), Mode(Mode) { in OperandARM32Mem()
471 ShiftKind ShiftOp, Operand *ShiftAmt) in OperandARM32FlexReg()
472 : OperandARM32Flex(kFlexReg, Ty), Reg(Reg), ShiftOp(ShiftOp), in OperandARM32FlexReg()
330 OperandARM32Mem(Cfg *Func, Type Ty, Variable *Base, Variable *Index, ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode) OperandARM32Mem() argument
470 OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp, Operand *ShiftAmt) OperandARM32FlexReg() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 774 unsigned ShiftOp = MI->getOperand(OpNum).getImm();
775 bool isASR = (ShiftOp & (1 << 5)) != 0;
776 unsigned Amt = ShiftOp & 0x1f;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 692 unsigned ShiftOp; in PromoteIntRes_ADDSUBSAT() local
696 ShiftOp = ISD::SRA; in PromoteIntRes_ADDSUBSAT()
700 ShiftOp = ISD::SRL; in PromoteIntRes_ADDSUBSAT()
717 return DAG.getNode(ShiftOp, dl, PromotedType, Result, ShiftAmount); in PromoteIntRes_ADDSUBSAT()
776 unsigned ShiftOp = Signed ? ISD::SRA : ISD::SRL; in PromoteIntRes_MULFIX() local
777 return DAG.getNode(ShiftOp, dl, PromotedType, Result, in PromoteIntRes_MULFIX()
3354 SDValue ShiftOp = N->getOperand(1); in ExpandIntRes_Shift() local
3359 if (ShiftOp.getValueType() != ShiftTy) in ExpandIntRes_Shift()
3360 ShiftOp = DAG.getZExtOrTrunc(ShiftOp, d in ExpandIntRes_Shift()
[all...] |
| H A D | DAGCombiner.cpp | 2052 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubOfSignBit() local
2054 if (!C || ShiftOp.getOpcode() != ISD::SRL) in foldAddSubOfSignBit()
2058 SDValue Not = ShiftOp.getOperand(0); in foldAddSubOfSignBit()
2063 EVT VT = ShiftOp.getValueType(); in foldAddSubOfSignBit()
2064 SDValue ShAmt = ShiftOp.getOperand(1); in foldAddSubOfSignBit()
6473 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); in calculateByteProvider() local
6474 if (!ShiftOp) in calculateByteProvider()
6477 uint64_t BitShift = ShiftOp->getZExtValue(); in calculateByteProvider()
7244 auto matchFirstShift = [&](SDValue V, SDValue &ShiftOp, in combineShiftOfShiftedLogic()
7254 ShiftOp in combineShiftOfShiftedLogic()
[all...] |
| H A D | SelectionDAGBuilder.cpp | 2719 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), dl, Reg, VT); in visitBitTestCase() local
2728 ShiftOp, DAG.getConstant(countTrailingZeros(B.Mask), dl, VT), in visitBitTestCase()
2734 ShiftOp, DAG.getConstant(countTrailingOnes(B.Mask), dl, VT), in visitBitTestCase()
2739 DAG.getConstant(1, dl, VT), ShiftOp); in visitBitTestCase()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1859 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; in expandSelectBoolean() local
1860 Result = CurDAG->getNode(ShiftOp, DL, MVT::i32, Result, in expandSelectBoolean()
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| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 195 ShiftOp shift = instr->ShiftField(); in PrintShiftRm()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 3342 unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL; in emitINSERT_DF_VIDX() local
3387 BuildMI(*BB, MI, DL, TII->get(ShiftOp), LaneTmp1) in emitINSERT_DF_VIDX()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 208 for (auto ShiftOp : {ISD::FSHL, ISD::FSHR}) { in X86TargetLowering()
209 setOperationAction(ShiftOp , MVT::i16 , Custom); in X86TargetLowering()
210 setOperationAction(ShiftOp , MVT::i32 , Custom); in X86TargetLowering()
212 setOperationAction(ShiftOp , MVT::i64 , Custom); in X86TargetLowering()
[all...] |
| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.cc | 1305 ShiftOp shift = instr->ShiftField(); in GetShiftRm()
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