/third_party/node/deps/v8/src/wasm/baseline/arm64/ |
H A D | liftoff-assembler-arm64.h | 1218 Sdiv(dst_w, lhs_w, rhs_w); in emit_i32_divs() 1228 Sdiv(dst_w, lhs_w, rhs_w); in emit_i32_divs() 1250 Sdiv(scratch, lhs_w, rhs_w); in emit_i32_rems() 1282 Sdiv(dst_x, lhs_x, rhs_x); in emit_i64_divs() 1292 Sdiv(dst_x, lhs_x, rhs_x); in emit_i64_divs() 1318 Sdiv(scratch, lhs_x, rhs_x); in emit_i64_rems()
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/third_party/vixl/benchmarks/aarch64/ |
H A D | bench-utils.cc | 209 __ Sdiv(PickR(size), PickR(size), PickR(size)); in GenerateTrivialSequence()
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/third_party/node/deps/v8/src/compiler/backend/arm64/ |
H A D | code-generator-arm64.cc | 1321 __ Sdiv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() 1324 __ Sdiv(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1)); in AssembleArchInstruction() 1335 __ Sdiv(temp, i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() 1342 __ Sdiv(temp, i.InputRegister32(0), i.InputRegister32(1)); in AssembleArchInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
H A D | IceTargetLoweringARM32.cpp | 455 case InstArithmetic::Sdiv: in genTargetHelperCallFor() 478 case InstArithmetic::Sdiv: in genTargetHelperCallFor() 511 case InstArithmetic::Sdiv: in genTargetHelperCallFor() 2729 case InstArithmetic::Sdiv: in lowerInt64Arithmetic() 2948 case InstArithmetic::Sdiv: { 3317 case InstArithmetic::Sdiv:
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H A D | IceTargetLoweringX8632.cpp | 1768 case InstArithmetic::Sdiv: in lowerArithmetic() 1873 case InstArithmetic::Sdiv: in lowerArithmetic() 1997 case InstArithmetic::Sdiv: in lowerArithmetic() 2153 case InstArithmetic::Sdiv: in lowerArithmetic() 6862 case InstArithmetic::Sdiv: in genTargetHelperCallFor() 6893 case InstArithmetic::Sdiv: in genTargetHelperCallFor()
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H A D | IceInstARM32.h | 416 Sdiv, enumerator 1015 using InstARM32Sdiv = InstARM32ThreeAddrGPR<InstARM32::Sdiv>;
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H A D | IceConverter.cpp | 285 return convertArithInstruction(Instr, Ice::InstArithmetic::Sdiv); in convertInstruction()
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H A D | WasmTranslator.cpp | 437 Control()->appendInst(InstArithmetic::create(Func, InstArithmetic::Sdiv, in Binop()
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H A D | IceTargetLoweringMIPS32.cpp | 375 case InstArithmetic::Sdiv: in genTargetHelperCallFor() 2694 case InstArithmetic::Sdiv: in lowerInt64Arithmetic() 2897 case InstArithmetic::Sdiv: { in lowerArithmetic()
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H A D | IceTargetLoweringX8664.cpp | 1797 case InstArithmetic::Sdiv: in lowerArithmetic() 1957 case InstArithmetic::Sdiv: in lowerArithmetic() 6181 case InstArithmetic::Sdiv: in genTargetHelperCallFor()
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H A D | IceInstARM32.cpp | 3418 template class InstARM32ThreeAddrGPR<InstARM32::Sdiv>;
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H A D | PNaClTranslator.cpp | 1788 Op = Ice::InstArithmetic::Sdiv; in convertBinopOpcode()
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/third_party/vixl/test/aarch64/ |
H A D | test-assembler-aarch64.cc | 1429 __ Sdiv(w2, w16, w16); in TEST() 1430 __ Sdiv(w3, w16, w17); in TEST() 1431 __ Sdiv(w4, w17, w18); in TEST() 1435 __ Sdiv(x7, x16, x16); in TEST() 1436 __ Sdiv(x8, x16, x17); in TEST() 1437 __ Sdiv(x9, x17, x18); in TEST() 1440 __ Sdiv(w11, w19, w21); in TEST() 1442 __ Sdiv(x13, x19, x21); in TEST() 1444 __ Sdiv(x15, x20, x21); in TEST() 1447 __ Sdiv(w2 in TEST() [all...] |
H A D | test-disasm-sve-aarch64.cc | 2423 COMPARE_MACRO(Sdiv(z20.VnS(), p5.Merging(), z23.VnS(), z20.VnS()), in TEST() 2425 COMPARE_MACRO(Sdiv(z15.VnD(), p6.Merging(), z30.VnD(), z8.VnD()), in TEST()
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H A D | test-assembler-sve-aarch64.cc | 4991 ArithPredicatedFn fn = &MacroAssembler::Sdiv;
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64-inl.h | 917 void TurboAssembler::Sdiv(const Register& rd, const Register& rn, in Sdiv() function in v8::internal::TurboAssembler
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H A D | macro-assembler-arm64.h | 1043 inline void Sdiv(const Register& rd, const Register& rn, const Register& rm);
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/third_party/vixl/src/aarch64/ |
H A D | macro-assembler-sve-aarch64.cc | 672 V(Sdiv, sdiv) \
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H A D | macro-assembler-aarch64.h | 2437 void Sdiv(const Register& rd, const Register& rn, const Register& rm) { in Sdiv() function in vixl::aarch64::MacroAssembler 5805 void Sdiv(const ZRegister& zd,
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/third_party/vixl/test/aarch32/ |
H A D | test-simulator-cond-rd-rn-rm-a32.cc | 124 M(Sdiv) \
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H A D | test-simulator-cond-rd-rn-rm-t32.cc | 123 M(Sdiv) \
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/third_party/vixl/src/aarch32/ |
H A D | macro-assembler-aarch32.h | 4059 void Sdiv(Condition cond, Register rd, Register rn, Register rm) { in MacroAssembler() function in vixl::aarch32::MacroAssembler 4073 void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); } in MacroAssembler() function in vixl::aarch32::MacroAssembler
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/third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
H A D | SubzeroReactor.cpp | 1256 return createArithmetic(Ice::InstArithmetic::Sdiv, lhs, rhs);
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