| /third_party/optimized-routines/ |
| H A D | Makefile | 13 SUBS = math string networking macro
33 $(foreach sub,$(SUBS),$(eval include $(srcdir)/$(sub)/Dir.mk))
45 all: $(SUBS:%=all-%)
47 ALL_FILES = $(foreach sub,$(SUBS),$($(sub)-files))
67 clean: $(SUBS:%=clean-%)
85 install: $(SUBS:%=install-%)
87 check: $(SUBS:%=check-%)
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| /third_party/skia/third_party/externals/freetype/src/autofit/ |
| H A D | afstyles.h | 72 STYLE_LATIN( s, S, subs, SUBS, ds, \
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | constants-arm64.h | 536 SUBS = SUB | AddSubSetFlagsBit
539 #define ADD_SUB_OP_LIST(V) V(ADD), V(ADDS), V(SUB), V(SUBS)
587 SBCS_w = AddSubWithCarryFixed | SUBS,
588 SBCS_x = AddSubWithCarryFixed | SUBS | SixtyFourBits
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| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeARM_64.c | 139 #define SUBS 0xeb000000 macro
845 return push_inst(compiler, SUBS | RD(TMP_ZERO) | RN(TMP_LR) | RM(dst) | (2 << 22) | (63 << 10)); in emit_op_imm()
849 return push_inst(compiler, SUBS | RD(TMP_ZERO) | RN(TMP_LR) | RM(dst) | (2 << 22) | (63 << 10)); in emit_op_imm()
884 return push_inst(compiler, (SUBS ^ inv_bits) | RD(TMP_ZERO) | RN(dst) | RM(TMP_ZERO)); in emit_op_imm()
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| H A D | sljitNativeARM_T2_32.c | 176 #define SUBS 0x1a00 macro
864 return push_inst16(compiler, SUBS | RD3(dst) | RN3(arg1) | RM3(arg2)); in emit_op_imm()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 57 SUBS,
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| H A D | AArch64ISelLowering.cpp | 1252 case AArch64ISD::SUBS: return "AArch64ISD::SUBS"; in getTargetNodeName()
1722 // The CMP instruction is just an alias for SUBS, and representing it as in emitComparison()
1723 // SUBS means that it's possible to get CSE with subtract operations. in emitComparison()
1726 unsigned Opcode = AArch64ISD::SUBS; in emitComparison()
2226 Opc = AArch64ISD::SUBS; in getAArch64XALUOOp()
2230 Opc = AArch64ISD::SUBS; in getAArch64XALUOOp()
2266 // shift will not be folded into the compare (SUBS). in getAArch64XALUOOp()
2268 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp()
2275 // (i64 AArch64ISD::SUBS i6 in getAArch64XALUOOp()
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 93 SUBS, // Flag-setting subtraction.
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| H A D | ARMISelLowering.cpp | 1570 case ARMISD::SUBS: return "ARMISD::SUBS"; in getTargetNodeName()
14541 // CMOV 0, z, !=, (CMPZ x, y) -> CMOV (SUBS x, y), z, !=, (SUBS x, y):1 in PerformCMOVCombine()
14543 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
14555 // CMOV z, 0, ==, (CMPZ x, y) -> CMOV (SUBS x, y), z, !=, (SUBS x, y):1 in PerformCMOVCombine()
14557 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
14569 // CMOV (SUBS x, y), z, !=, (SUBS in PerformCMOVCombine()
[all...] |
| /third_party/vixl/src/aarch64/ |
| H A D | constants-aarch64.h | 666 SUBS = SUB | AddSubSetFlagsBit enumerator
673 V(SUBS)
721 SBCS_w = AddSubWithCarryFixed | SUBS,
722 SBCS_x = AddSubWithCarryFixed | SUBS | SixtyFourBits
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| H A D | simulator-aarch64.cc | 3908 case SUBS: { in Simulator()
3966 (instr->Mask(AddSubOpMask) == SUBS)) { in Simulator()
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 1084 if ((instr->Mask(AddSubOpMask) == SUB) || instr->Mask(AddSubOpMask) == SUBS) { in AddSubWithCarry()
1812 case SUBS: {
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