Searched refs:ST0 (Results 1 - 15 of 15) sorted by relevance
| /third_party/ffmpeg/libavcodec/arm/ |
| H A D | mlpdsp_armv5te.S | 38 ST0 .req v5 label
192 SHIFT .req ST0
225 mov SHIFT, ST0
236 ldr ST0, [PSAMP]
239 and ST0, ST0, MASK
241 str ST0, [PST, #-4]!
242 str ST0, [PST, #4 * (MAX_BLOCKSIZE + MAX_FIR_ORDER)]
243 str ST0, [PSAMP], #4 * MAX_CHANNELS
408 ldm v1, {ST0,ST
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| /third_party/libunwind/libunwind/src/x86/ |
| H A D | init.h | 44 c->dwarf.loc[ST0] = DWARF_REG_LOC (&c->dwarf, UNW_X86_ST0); in common_init()
45 for (i = ST0 + 1; i < DWARF_NUM_PRESERVED_REGS; ++i) in common_init()
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| H A D | unwind_i.h | 47 #define ST0 11 macro
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| H A D | Gregs.c | 130 loc = c->dwarf.loc[ST0]; in tdep_access_fpreg()
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| H A D | Gget_save_loc.c | 50 case UNW_X86_ST0: loc = c->dwarf.loc[ST0]; break; in unw_get_save_loc()
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| H A D | Gos-linux.c | 135 c->dwarf.loc[ST0] = DWARF_NULL_LOC; in x86_handle_signal_frame()
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| H A D | Gos-freebsd.c | 138 c->dwarf.loc[ST0] = DWARF_NULL_LOC; in x86_handle_signal_frame()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 205 return StackTop - 1 - getSlot(RegNo) + X86::ST0;
852 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0); in popStackAfter()
1111 MachineOperand::CreateReg(X86::ST0, /*isDef*/ true, /*isImp*/ true)); in handleZeroArgFP()
1157 MachineOperand::CreateReg(X86::ST0, /*isDef*/ false, /*isImp*/ true)); in handleOneArgFP()
1504 // 1. Popped inputs. These must appear at the stack top in ST0-STn. A in handleSpecialFP()
1572 // Defs must be contiguous from the stack top. ST0-STn. in handleSpecialFP()
1579 // So must the clobbered stack slots. ST0-STm, m >= n. in handleSpecialFP()
1647 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
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| H A D | X86RegisterInfo.cpp | 573 Reserved.set(X86::ST0 + n); in getReservedRegs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86ATTInstPrinter.cpp | 484 if (Reg == X86::ST0) in printSTiRegOperand()
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| H A D | X86IntelInstPrinter.cpp | 441 if (Reg == X86::ST0) in printSTiRegOperand()
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| H A D | X86MCTargetDesc.cpp | 116 {codeview::RegisterId::ST0, X86::FP0}, in initLLVMToSEHAndCVRegMapping()
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| /third_party/mesa3d/src/mesa/x86/ |
| H A D | assyntax.h | 210 #define ST0 %st(0) macro
212 #define ST0 %st macro
891 #define ST0 st0 macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 1184 if (RegNo == X86::ST0) { in ParseRegister()
1197 case 0: RegNo = X86::ST0; break; in ParseRegister()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 2206 mcInst.addOperand(MCOperand::createReg(X86::ST0 + stackPos)); in translateFPRegister()
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