Searched refs:SOP1 (Results 1 - 9 of 9) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 25 SOP1 = 1 << 2,
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| H A D | SIInstrInfo.h | 358 return MI.getDesc().TSFlags & SIInstrFlags::SOP1; in isSOP1()
362 return get(Opcode).TSFlags & SIInstrFlags::SOP1; in isSOP1()
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_opcodes.py | 54 SOP1 = 1 variable in Format
425 # SOP1 instructions: 1 input, 1 output (+optional SCC)
426 SOP1 = { variable
496 # actually a pseudo-instruction. it's lowered to SALU during assembly though, so it's useful to identify it as a SOP1.
499 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, cls) in default_class(SOP1, InstrClass.Salu):
500 opcode(name, gfx7, gfx9, gfx10, Format.SOP1, cls)
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| H A D | aco_ir.h | 71 SOP1 = 1, member in aco::Format
1060 constexpr bool isSOP1() const noexcept { return format == Format::SOP1; }
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| H A D | aco_assembler.cpp | 150 case Format::SOP1: { in emit_instruction()
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| H A D | aco_insert_NOPs.cpp | 759 create_instruction<SOP1_instruction>(aco_opcode::s_mov_b32, Format::SOP1, 1, 1)};
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| H A D | aco_insert_exec_mask.cpp | 611 Format::SOP1, 1, 1)); in process_instructions()
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| H A D | aco_spill.cpp | 289 /* TODO: rematerialization is only supported for VOP1, SOP1 and PSEUDO */ in should_rematerialize()
290 if (instr->format != Format::VOP1 && instr->format != Format::SOP1 && in should_rematerialize()
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| H A D | aco_register_allocation.cpp | 3054 Format::SOP1, 1, 1)); in register_allocation()
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