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Help
Searched
refs:SI_SH_REG_END
(Results
1 - 6
of
6
) sorted by relevance
/third_party/mesa3d/src/amd/vulkan/
H
A
D
radv_cs.h
100
assert(reg >= SI_SH_REG_OFFSET && reg <
SI_SH_REG_END
);
in radeon_set_sh_reg_seq()
118
assert(reg >= SI_SH_REG_OFFSET && reg <
SI_SH_REG_END
);
in radeon_set_sh_reg_idx()
134
assert(reg >= SI_SH_REG_OFFSET && reg <
SI_SH_REG_END
);
in gfx10_set_sh_reg_idx3()
/third_party/mesa3d/src/amd/common/
H
A
D
sid.h
33
#define
SI_SH_REG_END
0x0000C000
macro
42
#define SI_SH_REG_SPACE_SIZE (
SI_SH_REG_END
- SI_SH_REG_OFFSET)
/third_party/mesa3d/src/gallium/drivers/r600/
H
A
D
r600d_common.h
32
#define
SI_SH_REG_END
0x0000C000
macro
H
A
D
r600_cs.h
169
assert(reg >= SI_SH_REG_OFFSET && reg <
SI_SH_REG_END
);
in radeon_set_sh_reg_seq()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H
A
D
si_pm4.c
87
} else if (reg >= SI_SH_REG_OFFSET && reg <
SI_SH_REG_END
) {
in si_pm4_set_reg()
H
A
D
si_build_pm4.h
115
assert((reg) >= SI_SH_REG_OFFSET && (reg) <
SI_SH_REG_END
); \
122
assert((reg) >= SI_SH_REG_OFFSET && (reg) <
SI_SH_REG_END
); \
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