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Searched refs:SDWA (Results 1 - 14 of 14) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIPeepholeSDWA.cpp1 //===- SIPeepholeSDWA.cpp - Peephole optimization for SDWA instructions ---===//
9 /// \file This pass tries to apply several peephole SDWA patterns.
59 STATISTIC(NumSDWAPatternsFound, "Number of SDWA patterns found.");
61 "Number of instruction converted to SDWA.");
99 StringRef getPassName() const override { return "SI Peephole SDWA"; }
138 using namespace AMDGPU::SDWA;
213 INITIALIZE_PASS(SIPeepholeSDWA, DEBUG_TYPE, "SI Peephole SDWA", false, false)
249 OS << "SDWA src: " << *getTargetOperand() in print()
257 OS << "SDWA dst: " << *getTargetOperand() in print()
264 OS << "SDWA preserv in print()
[all...]
H A DSIDefines.h41 SDWA = 1 << 14,
169 // Operand for SDWA instructions
230 SDWA = 2,
411 namespace SDWA { namespace
444 } // namespace SDWA
H A DSIInstrInfo.h430 return MI.getDesc().TSFlags & SIInstrFlags::SDWA; in isSDWA()
434 return get(Opcode).TSFlags & SIInstrFlags::SDWA; in isSDWA()
H A DSIInstrInfo.cpp3309 // Verify SDWA
3312 ErrInfo = "SDWA is not supported on this target";
3328 ErrInfo = "Only VGPRs allowed as operands in SDWA instructions on VI";
3334 ErrInfo = "Only reg allowed as operands in SDWA instructions on GFX9";
3345 ErrInfo = "OMod not allowed in SDWA instructions on VI";
3356 ErrInfo = "Only VCC allowed as dst in SDWA instructions on VI";
3363 ErrInfo = "Clamp not allowed in VOPC SDWA instructions on VI";
3370 ErrInfo = "OMod not allowed in VOPC SDWA instructions on VI";
3378 DstUnused->getImm() == AMDGPU::SDWA::UNUSED_PRESERVE) {
6319 SDWA
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp366 using namespace AMDGPU::SDWA; in getSDWASrcEncoding()
396 using namespace AMDGPU::SDWA; in getSDWAVopcDstEncoding()
H A DAMDGPUInstPrinter.cpp310 else if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::SDWA) in printVOPDst()
816 using namespace llvm::AMDGPU::SDWA; in printSDWASel()
827 default: llvm_unreachable("Invalid SDWA data select operand"); in printSDWASel()
855 using namespace llvm::AMDGPU::SDWA; in printSDWADstUnused()
863 default: llvm_unreachable("Invalid SDWA dest_unused operand"); in printSDWADstUnused()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp283 // Try to decode DPP and SDWA first to solve conflict with VOP1 and VOP2 in getInstruction()
1105 using namespace AMDGPU::SDWA;
1153 using namespace AMDGPU::SDWA;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp2665 (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) ) in checkTargetMatchPredicate()
2679 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) { in checkTargetMatchPredicate()
2700 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA, in getMatchedVariants()
2712 AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9, AMDGPUAsmVariants::DPP in getMatchedVariants()
2822 SIInstrFlags::SDWA)) { in validateConstantBusLimitations()
3073 if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc)) in validateMovrels()
3260 if ((Desc.TSFlags & (VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA)) == 0) in validateLdsDirect()
3286 return (Desc.TSFlags & SIInstrFlags::SDWA) == 0 && !IsRevOpcode(Opcode); in validateLdsDirect()
6790 using namespace llvm::AMDGPU::SDWA;
6823 using namespace llvm::AMDGPU::SDWA;
[all...]
/third_party/mesa3d/src/amd/compiler/
H A Daco_ir.h63 * - VOP2* | SDWA represents a VOP2 instruction with sub-dword addressing.
105 SDWA = 1 << 14, member in aco::Format
292 return (Format)((uint32_t)Format::SDWA | (uint32_t)format); in asSDWA()
518 * constant can be implemented with a SDWA v_mul_u32_u24. So consider all
1336 constexpr bool isSDWA() const noexcept { return (uint16_t)format & (uint16_t)Format::SDWA; }
H A Daco_assembler.cpp714 /* first emit the instruction without the SDWA operand */ in emit_instruction()
717 instr->format = (Format)((uint16_t)instr->format & ~(uint16_t)Format::SDWA); in emit_instruction()
H A Daco_ir.cpp276 (Format)(((uint16_t)tmp->format & ~(uint16_t)Format::VOP3) | (uint16_t)Format::SDWA); in convert_to_SDWA()
293 /* SDWA only uses operands 0 and 1. */ in convert_to_SDWA()
H A Daco_opcodes.py78 SDWA = 1 << 14 variable in Format
181 if self == Format.SDWA:
H A Daco_validate.cpp118 base_format = (Format)((uint32_t)base_format & ~(uint32_t)Format::SDWA); in validate_ir()
150 /* check SDWA */ in validate_ir()
154 "Format cannot have SDWA applied", instr.get()); in validate_ir()
156 check(program->gfx_level >= GFX8, "SDWA is GFX8 to GFX10.3 only", instr.get()); in validate_ir()
157 check(program->gfx_level < GFX11, "SDWA is GFX8 to GFX10.3 only", instr.get()); in validate_ir()
160 check(sdwa.omod == 0 || program->gfx_level >= GFX9, "SDWA omod only supported on GFX9+", in validate_ir()
164 "SDWA VOPC clamp only supported on GFX8", instr.get()); in validate_ir()
167 "SDWA+VOPC definition must be fixed to vcc on GFX8", instr.get()); in validate_ir()
170 check(def.bytes() <= 4, "SDWA definitions must not be larger than 4 bytes", in validate_ir()
173 "SDWA definitio in validate_ir()
[all...]
H A Daco_optimizer.cpp1857 if (instr->format == Format::VOPC && /* don't optimize VOP3 / SDWA / DPP */ in label_instruction()
2429 new_opcode, (Format)((uint16_t)Format::SDWA | (uint16_t)Format::VOPC), 2, 1); in combine_inverse_comparison()
2661 /* TODO: this can handle SDWA min/max instructions by using opsel */ in combine_minmax()
3181 /* omod flushes -0 to +0 and has no effect if denormals are enabled. SDWA omod is GFX9+. */ in apply_omod_clamp()
3791 /* Apply SDWA. Do this after label_instruction() so it can remove in combine_instruction()
3792 * label_extract if not all instructions can take SDWA. */ in combine_instruction()

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