/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
H A D | RDFDeadCode.cpp | 88 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG)) { in scanInstr() 89 if (!LiveNodes.count(RA.Id)) in scanInstr() 90 WorkQ.push_back(RA.Id); in scanInstr() 135 auto RA = DFG.addr<RefNode*>(N); in collect() local 136 if (DFG.IsDef(RA)) in collect() 137 processDef(RA, WorkQ); in collect() 139 processUse(RA, WorkQ); in collect() 145 auto RA = DFG.addr<RefNode*>(N); in collect() local 146 dbgs() << PrintNode<RefNode*>(RA, DFG) << "\n"; in collect() 159 for (NodeAddr<RefNode*> RA in collect() [all...] |
H A D | RDFGraph.cpp | 108 static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode*> RA, in printRefHeader() argument 110 OS << Print<NodeId>(RA.Id, G) << '<' in printRefHeader() 111 << Print<RegisterRef>(RA.Addr->getRegRef(G), G) << '>'; in printRefHeader() 112 if (RA.Addr->getFlags() & NodeAttrs::Fixed) in printRefHeader() 792 NodeAddr<RefNode*> RA = NA; in cloneNode() local 793 RA.Addr->setReachingDef(0); in cloneNode() 794 RA.Addr->setSibling(0); in cloneNode() 890 for (NodeAddr<RefNode*> RA : IA.Addr->members(*this)) in build() 891 AllRefs.insert(RA.Addr->getRegRef(*this)); in build() 1126 // Return the list of all reference nodes related to RA, includin 1193 locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA, Predicate P) const locateNextRef() argument 1215 getNextShadow(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA, bool Create) getNextShadow() argument 1702 NodeAddr<RefNode*> RA = IA.Addr->getFirstMember(*this); linkBlockRefs() local [all...] |
H A D | RDFRegisters.h | 115 bool alias(RegisterRef RA, RegisterRef RB) const { in alias() 116 if (!isRegMaskId(RA.Reg)) in alias() 117 return !isRegMaskId(RB.Reg) ? aliasRR(RA, RB) : aliasRM(RA, RB); in alias() 118 return !isRegMaskId(RB.Reg) ? aliasRM(RB, RA) : aliasMM(RA, RB); in alias() 152 bool aliasRR(RegisterRef RA, RegisterRef RB) const; 166 static bool isCoverOf(RegisterRef RA, RegisterRef RB, in isCoverOf() 168 return RegisterAggr(PRI).insert(RA).hasCoverOf(RB); in isCoverOf()
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H A D | HexagonRDFOpt.cpp | 166 for (NodeAddr<RefNode*> RA : SA.Addr->members(DFG)) { in run() 167 R2I.insert(std::make_pair(RA.Id, SA.Id)); in run() 168 if (DFG.IsDef(RA) && DeadNodes.count(RA.Id)) in run() 201 for (NodeAddr<RefNode*> RA : Refs) in removeOperand() 202 OpMap.insert(std::make_pair(RA.Id, getOpNum(RA.Addr->getOp()))); in removeOperand() 206 for (NodeAddr<RefNode*> RA : Refs) { in removeOperand() 207 unsigned N = OpMap[RA.Id]; in removeOperand() 209 RA in removeOperand() [all...] |
H A D | RDFCopy.cpp | 90 NodeAddr<RefNode*> RA = L.getNearestAliasedRef(RefRR, IA); in getLocalReachingDef() local 91 if (RA.Id != 0) { in getLocalReachingDef() 92 if (RA.Addr->getKind() == NodeAttrs::Def) in getLocalReachingDef() 93 return RA.Id; in getLocalReachingDef() 94 assert(RA.Addr->getKind() == NodeAttrs::Use); in getLocalReachingDef() 95 if (NodeId RD = RA.Addr->getReachingDef()) in getLocalReachingDef()
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H A D | RDFGraph.h | 10 // for a non-SSA program representation (e.g. post-RA machine code). 755 NodeAddr<RefNode*> RA) const; 757 NodeAddr<RefNode*> RA, bool Create); 759 NodeAddr<RefNode*> RA) const; 761 NodeAddr<RefNode*> RA, bool Create); 763 NodeAddr<RefNode*> RA) const; 766 NodeAddr<RefNode*> RA) const; 842 locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA, 864 void removeFromOwner(NodeAddr<RefNode*> RA) { in removeFromOwner() 865 NodeAddr<InstrNode*> IA = RA in removeFromOwner() 895 NodeAddr<RefNode*> RA = NA; getNextRef() local [all...] |
H A D | RDFRegisters.cpp | 131 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const { in aliasRR() argument 132 assert(Register::isPhysicalRegister(RA.Reg)); in aliasRR() 135 MCRegUnitMaskIterator UMA(RA.Reg, &TRI); in aliasRR() 139 // Skip units that are masked off in RA. in aliasRR() 141 if (PA.second.any() && (PA.second & RA.Mask).none()) { in aliasRR()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Object/ |
H A D | RelocationResolver.cpp | 361 int64_t RA = getELFAddend(R); in resolveRISCV() local 366 return (S + RA) & 0xFFFFFFFF; in resolveRISCV() 368 return (S + RA - R.getOffset()) & 0xFFFFFFFF; in resolveRISCV() 370 return S + RA; in resolveRISCV() 372 return (A & 0xC0) | ((S + RA) & 0x3F); in resolveRISCV() 374 return (A & 0xC0) | (((A & 0x3F) - (S + RA)) & 0x3F); in resolveRISCV() 376 return (A + (S + RA)) & 0xFF; in resolveRISCV() 378 return (A - (S + RA)) & 0xFF; in resolveRISCV() 380 return (A + (S + RA)) & 0xFFFF; in resolveRISCV() 382 return (A - (S + RA)) in resolveRISCV() [all...] |
/third_party/openssl/crypto/bn/asm/ |
H A D | bn-c64xplus.asm | 38 .asg B3,RA 54 [!B0] BNOP RA 76 BNOP RA,4 84 [!B0] BNOP RA 102 BNOP RA,4 110 [!B0] BNOP RA 125 SPKERNEL 2,0 ; fully overlap BNOP RA,5 128 BNOP RA,5 135 [!B0] BNOP RA 149 SPKERNEL 0,0 ; fully overlap BNOP RA, [all...] |
/third_party/node/deps/openssl/openssl/crypto/ |
H A D | c64xpluscpuid.pl | 28 .asg B3,RA 33 B RA 48 [!B0] BNOP RA 74 || BNOP RA 95 [!B0] BNOP RA 109 BNOP RA,3 126 [B1] BNOP RA,4 143 || BNOP RA 227 BNOP RA,5 282 BNOP RA, [all...] |
/third_party/openssl/crypto/ |
H A D | c64xpluscpuid.pl | 28 .asg B3,RA 33 B RA 48 [!B0] BNOP RA 74 || BNOP RA 95 [!B0] BNOP RA 109 BNOP RA,3 126 [B1] BNOP RA,4 143 || BNOP RA 227 BNOP RA,5 282 BNOP RA, [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Transforms/IPO/ |
H A D | DeadArgumentElimination.h | 131 void MarkValue(const RetOrArg &RA, Liveness L, 133 void MarkLive(const RetOrArg &RA); 135 void PropagateLiveness(const RetOrArg &RA);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/IPO/ |
H A D | DeadArgumentElimination.cpp | 658 /// MarkValue - This function marks the liveness of RA depending on L. If L is 660 /// such that RA will be marked live if any use in MaybeLiveUses gets marked 662 void DeadArgumentEliminationPass::MarkValue(const RetOrArg &RA, Liveness L, in MarkValue() argument 666 MarkLive(RA); in MarkValue() 672 Uses.insert(std::make_pair(MaybeLiveUse, RA)); in MarkValue() 697 void DeadArgumentEliminationPass::MarkLive(const RetOrArg &RA) { in MarkLive() argument 698 if (LiveFunctions.count(RA.F)) in MarkLive() 701 if (!LiveValues.insert(RA).second) in MarkLive() 705 << RA.getDescription() << " live\n"); in MarkLive() 706 PropagateLiveness(RA); in MarkLive() 711 PropagateLiveness(const RetOrArg &RA) PropagateLiveness() argument [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
H A D | TargetSubtargetInfo.cpp | 21 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, in TargetSubtargetInfo() 23 : MCSubtargetInfo(TT, CPU, FS, PF, PD, WPR, WL, RA, IS, OC, FP) { in TargetSubtargetInfo() 17 TargetSubtargetInfo( const Triple &TT, StringRef CPU, StringRef FS, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP) TargetSubtargetInfo() argument
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/third_party/node/deps/openssl/openssl/crypto/sha/asm/ |
H A D | keccak1600-c64x.pl | 98 .asg B3,RA 375 ||[!A0] LDDW *SP[4], RA:B2 399 BNOP RA,5 413 STW RA, *SP[15] 463 ADDKPC ret?,RA 523 LDW *SP[15],RA 543 || BNOP RA 562 STW RA, *SP[15] 625 || ADDKPC loop?,RA 626 STDW RA [all...] |
/third_party/openssl/crypto/sha/asm/ |
H A D | keccak1600-c64x.pl | 98 .asg B3,RA 375 ||[!A0] LDDW *SP[4], RA:B2 399 BNOP RA,5 413 STW RA, *SP[15] 463 ADDKPC ret?,RA 523 LDW *SP[15],RA 543 || BNOP RA 562 STW RA, *SP[15] 625 || ADDKPC loop?,RA 626 STDW RA [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
H A D | IceInstMIPS32.cpp | 229 InstMIPS32Ret::InstMIPS32Ret(Cfg *Func, Variable *RA, Variable *Source) in InstMIPS32Ret() argument 231 addSource(RA); in InstMIPS32Ret() 332 auto *RA = llvm::cast<Variable>(getSrc(0)); in emit() local 333 assert(RA->hasReg()); in emit() 334 assert(RA->getRegNum() == RegMIPS32::Reg_RA); in emit() 339 RA->emit(Func); in emit() 517 auto *RA = llvm::cast<Variable>(getSrc(0)); in emitIAS() local 518 assert(RA->hasReg()); in emitIAS() 519 assert(RA->getRegNum() == RegMIPS32::Reg_RA); in emitIAS() 520 (void)RA; in emitIAS() [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
H A D | FunctionComparator.cpp | 115 Attribute RA = *RI; in cmpAttrs() local 116 if (LA.isTypeAttribute() && RA.isTypeAttribute()) { in cmpAttrs() 117 if (LA.getKindAsEnum() != RA.getKindAsEnum()) in cmpAttrs() 118 return cmpNumbers(LA.getKindAsEnum(), RA.getKindAsEnum()); in cmpAttrs() 121 Type *TyR = RA.getValueAsType(); in cmpAttrs() 129 if (LA < RA) in cmpAttrs() 131 if (RA < LA) in cmpAttrs() 302 const ConstantArray *RA = cast<ConstantArray>(R); in cmpConstants() local 309 cast<Constant>(RA->getOperand(i)))) in cmpConstants()
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/third_party/node/deps/openssl/openssl/crypto/poly1305/asm/ |
H A D | poly1305-c64xplus.pl | 49 .asg B3,RA 89 || BNOP RA 110 [!A2] BNOP RA ; no data 256 || BNOP RA 316 BNOP RA,1
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/third_party/openssl/crypto/poly1305/asm/ |
H A D | poly1305-c64xplus.pl | 49 .asg B3,RA 89 || BNOP RA 110 [!A2] BNOP RA ; no data 256 || BNOP RA 316 BNOP RA,1
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/third_party/node/deps/openssl/openssl/crypto/modes/asm/ |
H A D | ghash-c64xplus.pl | 54 .asg B3,RA 211 ||[!B0] BNOP RA 224 [!B0] BNOP RA ; 11/-
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/third_party/openssl/crypto/modes/asm/ |
H A D | ghash-c64xplus.pl | 54 .asg B3,RA 211 ||[!B0] BNOP RA 224 [!B0] BNOP RA ; 11/-
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/third_party/node/deps/openssl/openssl/crypto/aes/asm/ |
H A D | aes-c64xplus.pl | 66 .asg B3,RA 262 || BNOP RA 288 || BNOP RA 474 || BNOP RA 500 || BNOP RA 534 [!A0] B RA 536 ||[!A0] MVK 1,A1 ; only one B RA 537 [!A1] B RA 574 BNOP RA,5 639 BNOP RA [all...] |
/third_party/openssl/crypto/aes/asm/ |
H A D | aes-c64xplus.pl | 66 .asg B3,RA 262 || BNOP RA 288 || BNOP RA 474 || BNOP RA 500 || BNOP RA 534 [!A0] B RA 536 ||[!A0] MVK 1,A1 ; only one B RA 537 [!A1] B RA 574 BNOP RA,5 639 BNOP RA [all...] |
/third_party/cmsis/CMSIS/Core/Include/m-profile/ |
H A D | armv8m_mpu.h | 41 * \param RA Read Allocation: Set to 1 to enable cache allocation on read miss. Set to 0 to disable cache allocation on read miss. 44 #define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \ 45 ((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U)) 60 * WT = Write Through, WB = Write Back, TR = Transient, RA = Read-Allocate, WA = Write Allocate
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