| /third_party/ffmpeg/libavcodec/arm/ |
| H A D | simple_idct_arm.S | 63 @@ at this point, R0=block, R14=&block[56], R12=__const_ptr_, R1-R11 free
76 @@ R3=ROWr32[2], R4=ROWr32[3], R5-R11 free
88 @@ R5=(temp), R6=ROWr16[0], R7=ROWr16[1], R8-R11 free,
106 ldr r11, =W7 @ R11=W7
119 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7,
127 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7,
159 @@ R5=b2, R6=ROWr16[0], R7=b3, R8 (free), R9 (free), R10 (free), R11 (free),
174 mul r11, r10, r4 @ R11=W6*ROWr16[2]
183 mul r11, r8, r4 @ R11=W2*ROWr16[2]
189 @@ R5=b2, R6=a0, R7=b3, R8=W2, R9=W4, R10=W6, R11 (fre
[all...] |
| /third_party/libunwind/libunwind/src/x86_64/ |
| H A D | init.h | 60 c->dwarf.loc[R11] = REG_INIT_LOC(c, r11, R11); in common_init()
|
| H A D | unwind_i.h | 50 #define R11 11 macro
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| H A D | Gregs.c | 116 case UNW_X86_64_R11: loc = c->dwarf.loc[R11]; break; in tdep_access_reg()
|
| H A D | Gos-solaris.c | 83 c->dwarf.loc[R11] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_R11, 0); in x86_64_handle_signal_frame()
|
| H A D | Gos-freebsd.c | 122 c->dwarf.loc[R11] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_R11, 0); in x86_64_handle_signal_frame()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 51 case R8: case R9: case R10: case R11: case R12: in isARMArea1Register()
63 case R8: case R9: case R10: case R11: case R12: in isARMArea2Register()
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| H A D | Thumb1FrameLowering.cpp | 213 case ARM::R11: in emitPrologue()
275 case ARM::R11: in emitPrologue()
356 case ARM::R11: in emitPrologue()
877 static const unsigned AllHighRegs[] = {ARM::R11, ARM::R10, ARM::R9, ARM::R8}; in spillCalleeSavedRegisters()
986 static const unsigned AllHighRegs[] = {ARM::R8, ARM::R9, ARM::R10, ARM::R11}; in restoreCalleeSavedRegisters()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| H A D | MSP430RegisterInfo.cpp | 53 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
59 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
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| /third_party/node/deps/openssl/openssl/crypto/sha/asm/ |
| H A D | keccak1600-avx512vl.pl | 56 my ($R20,$R01,$R31,$R21,$R41,$R11) = map("%ymm$_",(16..21));
110 vprolvq $R11,$A11,@T[1] # $A11 -> future $A01
215 vmovdqa64 5*32(%r8),$R11
301 vmovdqa64 5*32(%r8),$R11
|
| /third_party/openssl/crypto/sha/asm/ |
| H A D | keccak1600-avx512vl.pl | 56 my ($R20,$R01,$R31,$R21,$R41,$R11) = map("%ymm$_",(16..21));
110 vprolvq $R11,$A11,@T[1] # $A11 -> future $A01
215 vmovdqa64 5*32(%r8),$R11
301 vmovdqa64 5*32(%r8),$R11
|
| /third_party/musl/arch/x32/bits/ |
| H A D | reg.h | 9 #define R11 6 macro
|
| /third_party/musl/arch/x86_64/bits/ |
| H A D | reg.h | 9 #define R11 6 macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 167 {codeview::RegisterId::R11, X86::R11}, in initLLVMToSEHAndCVRegMapping()
649 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: in getX86SubSuperRegisterOrZero()
686 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: in getX86SubSuperRegisterOrZero()
722 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: in getX86SubSuperRegisterOrZero()
758 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: in getX86SubSuperRegisterOrZero()
759 return X86::R11; in getX86SubSuperRegisterOrZero()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiBaseInfo.h | 69 case Lanai::R11: in getLanaiRegisterNumbering()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 354 Value *R11, *R12; in getMaskedTypeForICmpPair() local
356 if (decomposeBitTestICmp(R1, R2, PredR, R11, R12, R2)) { in getMaskedTypeForICmpPair()
357 if (R11 == L11 || R11 == L12 || R11 == L21 || R11 == L22) { in getMaskedTypeForICmpPair()
358 A = R11; in getMaskedTypeForICmpPair()
362 D = R11; in getMaskedTypeForICmpPair()
370 if (!match(R1, m_And(m_Value(R11), m_Value(R12)))) { in getMaskedTypeForICmpPair()
373 R11 in getMaskedTypeForICmpPair()
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCTargetDesc.cpp | 43 InitBPFMCRegisterInfo(X, BPF::R11 /* RAReg doesn't exist */); in createBPFMCRegisterInfo()
|
| /third_party/rust/crates/libc/src/fuchsia/ |
| H A D | x86_64.rs | 127 pub const R11: ::c_int = 6; consts
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 184 ENTRY(R11) \
202 ENTRY(R11) \
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ExpandPseudo.cpp | 92 BuildMI(*MBB, MBBI, DL, TII->get(X86::LEA64r), X86::R11) in ExpandICallBranchFunnel()
101 .addReg(X86::R11); in ExpandICallBranchFunnel()
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| H A D | X86RetpolineThunks.cpp | 151 populateThunk(MF, X86::R11); in runOnMachineFunction()
|
| /third_party/ltp/tools/sparse/sparse-src/validation/ |
| H A D | repeat.h | 12 #define R11(P, S) R9(P,S##0) R9(P,S##1) R9(P,S##2) R9(P,S##3) macro
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 98 BPF::R6, BPF::R7, BPF::R8, BPF::R9, BPF::R10, BPF::R11};
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.h | 378 return IsPPC64 ? PPC::X11 : PPC::R11; in getEnvironmentPointerRegister()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.cpp | 56 Reserved.set(Lanai::R11); in getReservedRegs()
|