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Searched refs:PVR_HAS_FEATURE (Results 1 - 16 of 16) sorted by relevance

/third_party/mesa3d/src/imagination/include/hwdef/
H A Drogue_hw_utils.h110 if (PVR_HAS_FEATURE(dev_info, roguexe)) { in rogue_get_min_free_list_size()
135 if (PVR_HAS_FEATURE(dev_info, eight_output_registers)) in rogue_get_max_output_regs_per_pixel()
151 if (!PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format) || in rogue_get_num_macrotiles_xy()
167 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) in rogue_get_macrotile_array_size()
184 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format) && in rogue_get_region_header_size()
195 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) in rogue_get_render_size_max()
196 if (!PVR_HAS_FEATURE(dev_info, screen_size8K)) in rogue_get_render_size_max()
230 if (PVR_HAS_FEATURE(dev_info, compute)) in rogue_max_compute_shared_registers()
239 if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support)) { in rogue_get_cdm_context_resume_buffer_size()
255 if (PVR_HAS_FEATURE(dev_inf in rogue_get_cdm_context_resume_buffer_alignment()
[all...]
/third_party/mesa3d/src/imagination/vulkan/
H A Dpvr_tex_state.c149 if (!PVR_HAS_FEATURE(dev_info, tpu_extended_integer_lookup) && in pvr_pack_tex_state()
150 !PVR_HAS_FEATURE(dev_info, tpu_image_state_v2)) { in pvr_pack_tex_state()
159 if (PVR_HAS_FEATURE(dev_info, tpu_image_state_v2) && in pvr_pack_tex_state()
172 } else if (PVR_HAS_FEATURE(dev_info, tpu_array_textures)) { in pvr_pack_tex_state()
184 if (!PVR_HAS_FEATURE(dev_info, tpu_extended_integer_lookup) && in pvr_pack_tex_state()
185 !PVR_HAS_FEATURE(dev_info, tpu_image_state_v2)) { in pvr_pack_tex_state()
200 if (PVR_HAS_FEATURE(dev_info, tpu_image_state_v2) && in pvr_pack_tex_state()
H A Dpvr_job_common.c129 if (PVR_HAS_FEATURE(dev_info, eight_output_registers)) { in pvr_pbe_get_src_pos()
374 if (PVR_HAS_FEATURE(dev_info, xt_top_infrastructure)) in pvr_setup_tiles_in_flight()
376 else if (PVR_HAS_FEATURE(dev_info, roguexe)) in pvr_setup_tiles_in_flight()
400 if (!PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format) || in pvr_setup_tiles_in_flight()
414 if (PVR_HAS_FEATURE(dev_info, roguexe)) { in pvr_setup_tiles_in_flight()
437 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format) && in pvr_setup_tiles_in_flight()
446 if (PVR_HAS_FEATURE(dev_info, paired_tiles) && paired_tiles) { in pvr_setup_tiles_in_flight()
459 PVR_HAS_FEATURE(dev_info, eight_output_registers)) { in pvr_setup_tiles_in_flight()
467 if (PVR_HAS_FEATURE(dev_info, usc_pixel_partition_mask)) { in pvr_setup_tiles_in_flight()
483 if (PVR_HAS_FEATURE(dev_inf in pvr_setup_tiles_in_flight()
[all...]
H A Dpvr_job_render.c329 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_rt_mtile_info_init()
375 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_rt_get_isp_region_size()
593 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_rt_get_region_headers_stride_size()
944 !(PVR_HAS_FEATURE(dev_info, roguexe) && mtile_info->tile_size_x == 16)) { in pvr_rt_dataset_ws_create_info_init()
1000 if (!PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_rt_dataset_ws_create_info_init()
1008 if (!PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_rt_dataset_ws_create_info_init()
1284 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_get_isp_num_tiles_xy()
1344 if (PVR_HAS_FEATURE(dev_info, cluster_grouping) && in pvr_render_job_ws_fragment_state_init()
1345 PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls) && in pvr_render_job_ws_fragment_state_init()
1410 if (PVR_HAS_FEATURE(dev_inf in pvr_render_job_ws_fragment_state_init()
[all...]
H A Dpvr_cmd_buffer.c732 if (PVR_HAS_FEATURE(dev_info, usc_f16sop_u8)) { in pvr_setup_pbe_state()
787 assert(position <= 3 || PVR_HAS_FEATURE(dev_info, eight_output_registers)); in pvr_setup_pbe_state()
1102 if (PVR_HAS_FEATURE(dev_info, compute_morton_capable)) in pvr_sub_cmd_compute_job_init()
1109 if (PVR_HAS_FEATURE(dev_info, cluster_grouping) && in pvr_sub_cmd_compute_job_init()
1110 PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls) && in pvr_sub_cmd_compute_job_init()
1130 if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support) && in pvr_sub_cmd_compute_job_init()
1164 (PVR_HAS_FEATURE(dev_info, compute_overlap) || in pvr_compute_flat_slot_size()
1165 PVR_HAS_FEATURE(dev_info, gs_rta_support))) { in pvr_compute_flat_slot_size()
1808 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in check_viewport_quirk_70165()
1815 if (PVR_HAS_FEATURE(dev_inf in check_viewport_quirk_70165()
[all...]
H A Dpvr_descriptor_set.c91 (PVR_HAS_FEATURE(dev_info, tpu_array_textures) \
1459 !PVR_HAS_FEATURE(dev_info, tpu_extended_integer_lookup)) { in pvr_write_image_descriptor_primaries()
1480 if (!PVR_HAS_FEATURE(dev_info, tpu_array_textures)) { in pvr_write_image_descriptor_secondaries()
1655 !PVR_HAS_FEATURE(dev_info, tpu_extended_integer_lookup)) { in pvr_write_buffer_descriptor()
1782 if (!PVR_HAS_FEATURE(dev_info, tpu_array_textures)) { in pvr_descriptor_update_input_attachment()
H A Dpvr_device.c603 PVR_HAS_FEATURE(&pdevice->dev_info, robust_buffer_access), in pvr_GetPhysicalDeviceFeatures2()
624 .textureCompressionASTC_LDR = PVR_HAS_FEATURE(&pdevice->dev_info, astc), in pvr_GetPhysicalDeviceFeatures2()
677 if (PVR_HAS_FEATURE(dev_info, s8xe)) { in pvr_calc_fscommon_size_and_tiles_in_flight()
818 PVR_HAS_FEATURE(&pdevice->dev_info, simple_internal_parameter_format) in pvr_GetPhysicalDeviceProperties2()
H A Dpvr_image.c415 if (PVR_HAS_FEATURE(&device->pdevice->dev_info, tpu_array_textures)) in pvr_CreateBufferView()
H A Dpvr_pass.c301 if (PVR_HAS_FEATURE(dev_info, eight_output_registers)) \
H A Dpvr_job_context.c63 assert(PVR_HAS_FEATURE(dev_info, compute)); in pvr_ctx_reset_cmd_init()
1046 state.target = !PVR_HAS_FEATURE(dev_info, compute_morton_capable); in pvr_compute_ctx_ws_static_state_init()
H A Dpvr_pipeline.c240 1U + (size_t)PVR_HAS_FEATURE(dev_info, pds_ddmadt); in pvr_pds_get_max_vertex_program_const_map_size_in_bytes()
/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/
H A Dpvr_srv.c387 if (PVR_HAS_FEATURE(dev_info, roguexe)) { in pvr_srv_get_min_free_list_size()
461 !PVR_HAS_FEATURE(dev_info, compute_overlap)) { in pvr_srv_get_max_coeffs()
484 if (PVR_HAS_QUIRK(dev_info, 48492) && PVR_HAS_FEATURE(dev_info, roguexe) && in pvr_srv_get_cdm_max_local_mem_size_regs()
485 !PVR_HAS_FEATURE(dev_info, compute_overlap)) { in pvr_srv_get_cdm_max_local_mem_size_regs()
530 if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support)) { in pvr_srv_winsys_device_info_init()
/third_party/mesa3d/src/imagination/vulkan/pds/
H A Dpvr_pds.c106 if (PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls)) { in pvr_pds_encode_ld_src0()
168 cache_control_const[PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls) ? 0 in pvr_pds_encode_doutw_src1()
386 if (PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls)) in pvr_pds_write_dma_address()
461 if (PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls)) { in pvr_pds_encode_dma_burst()
798 if (!PVR_HAS_FEATURE(dev_info, pds_ddmadt)) { in pvr_pds_vertex_shader()
1002 if ((!PVR_HAS_FEATURE(dev_info, pds_ddmadt)) && in pvr_pds_vertex_shader()
1216 if (PVR_HAS_FEATURE(dev_info, pds_ddmadt)) { in pvr_pds_vertex_shader()
1356 if (PVR_HAS_FEATURE(dev_info, pds_ddmadt)) { in pvr_pds_vertex_shader()
1387 if (!PVR_HAS_FEATURE(dev_info, pds_ddmadt)) { in pvr_pds_vertex_shader()
1408 if (PVR_HAS_FEATURE(dev_inf in pvr_pds_vertex_shader()
[all...]
H A Dpvr_xgl_pds.c261 if (PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls)) { in pvr_encode_direct_write()
668 if (PVR_HAS_FEATURE(dev_info, pds_ddmadt)) { in pvr_pds_generate_vertex_primary_program()
735 PVR_HAS_FEATURE(dev_info, pds_ddmadt) in pvr_pds_generate_vertex_primary_program()
1063 if (last_DMA && (!PVR_HAS_FEATURE(dev_info, pds_ddmadt) || in pvr_pds_generate_vertex_primary_program()
1077 if (PVR_HAS_FEATURE(dev_info, pds_ddmadt)) { in pvr_pds_generate_vertex_primary_program()
H A Dpvr_pds.h59 PVR_HAS_FEATURE(dev_info, compute_morton_capable) && \
/third_party/mesa3d/src/imagination/common/
H A Dpvr_device_info.h144 #define PVR_HAS_FEATURE(dev_info, feature) ((dev_info)->features.has_##feature) macro
164 * \sa #PVR_HAS_FEATURE() and #PVR_GET_FEATURE_VALUE()
195 * \sa #PVR_HAS_FEATURE() and #PVR_FEATURE_VALUE()

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