/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/JITLink/ |
H A D | EHFrameSupport.cpp | 140 ParseContext PC(G); in operator ()() 145 PC.AddrToSyms.addSymbols(Sec.symbols()); in operator ()() 146 if (auto Err = PC.AddrToBlock.addBlocks(Sec.blocks(), in operator ()() 162 if (auto Err = processBlock(PC, *B)) in operator ()() 168 Error EHFrameEdgeFixer::processBlock(ParseContext &PC, Block &B) { in processBlock() argument 199 BinaryStreamReader BlockReader(B.getContent(), PC.G.getEndianness()); in processBlock() 238 if (auto Err = processCIE(PC, B, RecordStartOffset, in processBlock() 243 if (auto Err = processFDE(PC, B, RecordStartOffset, in processBlock() 257 Error EHFrameEdgeFixer::processCIE(ParseContext &PC, Block &B, in processCIE() argument 265 BinaryStreamReader RecordReader(RecordContent, PC in processCIE() 383 processFDE(ParseContext &PC, Block &B, size_t RecordOffset, size_t RecordLength, size_t CIEDeltaFieldOffset, uint32_t CIEDelta, BlockEdgeMap &BlockEdges) processFDE() argument 603 getOrCreateSymbol(ParseContext &PC, JITTargetAddress Addr) getOrCreateSymbol() argument [all...] |
H A D | EHFrameSupportImpl.h | 39 /// A LinkGraph pass that adds missing FDE-to-CIE, FDE-to-PC and FDE-to-LSDA 90 Error processBlock(ParseContext &PC, Block &B); 91 Error processCIE(ParseContext &PC, Block &B, size_t RecordOffset, 93 Error processFDE(ParseContext &PC, Block &B, size_t RecordOffset, 101 Expected<Symbol &> getOrCreateSymbol(ParseContext &PC, JITTargetAddress Addr);
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/third_party/optimized-routines/math/ |
H A D | erf.c | 19 #define PC __erf_data.erfc_poly_C macro 116 double r1 = fma (a, PC[1], PC[0]); in erf() 117 double r2 = fma (a, PC[3], PC[2]); in erf() 118 double r3 = fma (a, PC[5], PC[4]); in erf() 119 double r4 = fma (a, PC[7], PC[6]); in erf() 120 double r5 = fma (a, PC[ in erf() [all...] |
/third_party/ffmpeg/libavfilter/ |
H A D | vf_xbr.c | 92 #define FILT2(PE, PI, PH, PF, PG, PC, PD, PB, PA, G5, C4, G0, D0, C1, B1, F4, I4, H5, I5, A0, A1, \ 95 const unsigned e = df(PE,PC) + df(PE,PG) + df(PI,H5) + df(PI,F4) + (df(PH,PF)<<2); \ 101 || eq(PE,PG) || eq(PE,PC))) { \ 103 const unsigned ki = df(PH,PC); \ 105 const int up = ke >= ki<<1 && PE != PC && PB != PC; \ 126 #define FILT3(PE, PI, PH, PF, PG, PC, PD, PB, PA, G5, C4, G0, D0, C1, B1, F4, I4, H5, I5, A0, A1, \ 129 const unsigned e = df(PE,PC) + df(PE,PG) + df(PI,H5) + df(PI,F4) + (df(PH,PF)<<2); \ 133 if (e < i && (!eq(PF,PB) && !eq(PF,PC) || !eq(PH,PD) && !eq(PH,PG) || eq(PE,PI) \ 135 || eq(PE,PG) || eq(PE,PC))) { \ 270 const uint32_t PC = sa1[pnext]; xbr_filter() local [all...] |
/third_party/json/tests/thirdparty/Fuzzer/ |
H A D | FuzzerTracePC.cpp | 1 //===- FuzzerTracePC.cpp - PC tracing--------------------------------------===// 31 void TracePC::HandleTrace(uint32_t *Guard, uintptr_t PC) { in HandleTrace() argument 34 PCs[Idx % kNumPCs] = PC; in HandleTrace() 163 uintptr_t PC = ModuleOffset + PcOffset; 164 auto FileStr = DescribePC("%s", PC); 170 auto FunctionStr = DescribePC("%F", PC); 175 std::string LineStr = DescribePC("%l", PC); 204 // The interesting value is mixed up with the PC and is then added to the map. 217 size_t PC = reinterpret_cast<size_t>(caller_pc); 221 TPC.HandleValueProfile((PC [all...] |
H A D | FuzzerUtil.cpp | 182 std::string DescribePC(const char *SymbolizedFMT, uintptr_t PC) { in DescribePC() argument 185 EF->__sanitizer_symbolize_pc(reinterpret_cast<void*>(PC), in DescribePC() 191 void PrintPC(const char *SymbolizedFMT, const char *FallbackFMT, uintptr_t PC) { in PrintPC() argument 193 Printf("%s", DescribePC(SymbolizedFMT, PC).c_str()); in PrintPC() 195 Printf(FallbackFMT, PC); in PrintPC()
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H A D | FuzzerUtil.h | 38 void PrintPC(const char *SymbolizedFMT, const char *FallbackFMT, uintptr_t PC); 40 std::string DescribePC(const char *SymbolizedFMT, uintptr_t PC);
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H A D | FuzzerTracePC.h | 49 void HandleTrace(uint32_t *guard, uintptr_t PC); 53 template <class T> void HandleCmp(void *PC, T Arg1, T Arg2);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.h | 78 return Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT() 79 // ADD PC, SP and BLX PC were always unpredictable, in isV8EligibleForIT() 83 return Instr->getOperand(0).getReg() != ARM::PC; in isV8EligibleForIT() 85 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT() 86 Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT() 89 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT() 90 Instr->getOperand(1).getReg() != ARM::PC; in isV8EligibleForIT()
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H A D | ARMAsmPrinter.cpp | 777 + "PC" + Twine(FunctionNumber) + "_" + Twine(LabelId)); 1313 .addReg(ARM::PC) 1359 .addReg(ARM::PC) 1367 .addReg(ARM::PC) 1379 .addReg(ARM::PC) 1536 .addReg(ARM::PC) 1556 .addReg(ARM::PC) 1577 // a PC-relative address at the ldr instruction. 1600 .addReg(ARM::PC) 1648 .addReg(ARM::PC) [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetObjectFile.cpp | 47 const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext()); in getTTypeGlobalReference() local 48 return MCBinaryExpr::createSub(Res, PC, getContext()); in getTTypeGlobalReference() 65 "Arch64 does not support GOT PC rel with extra offset"); in getIndirectSymViaGOTPCRel() 72 const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext()); in getIndirectSymViaGOTPCRel() local 73 return MCBinaryExpr::createSub(Res, PC, getContext()); in getIndirectSymViaGOTPCRel()
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H A D | AArch64PromoteConstant.cpp | 470 AArch64PromoteConstant::PromotedConstant &PC) { in ensurePromotedGV() 471 assert(PC.ShouldConvert && in ensurePromotedGV() 473 if (PC.GV) in ensurePromotedGV() 475 PC.GV = new GlobalVariable( in ensurePromotedGV() 478 PC.GV->setInitializer(&C); in ensurePromotedGV() 480 LLVM_DEBUG(PC.GV->print(dbgs())); in ensurePromotedGV() 469 ensurePromotedGV(Function &F, Constant &C, AArch64PromoteConstant::PromotedConstant &PC) ensurePromotedGV() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
H A D | FlattenCFG.cpp | 177 Value *PC = PBI->getCondition(); in FlattenParallelAndOr() local 178 if (!PC || !PC->hasOneUse()) in FlattenParallelAndOr() 284 Value *PC = PBI->getCondition(); in FlattenParallelAndOr() local 299 NC = Builder.CreateOr(PC, CC); in FlattenParallelAndOr() 302 NC = Builder.CreateAnd(PC, CC); in FlattenParallelAndOr() 305 PC = NC; in FlattenParallelAndOr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
H A D | MCInstrDesc.cpp | 36 unsigned PC = RI.getProgramCounter(); in mayAffectControlFlow() local 37 if (PC == 0) in mayAffectControlFlow() 39 if (hasDefOfPhysReg(MI, PC, RI)) in mayAffectControlFlow()
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H A D | MCAsmInfo.cpp | 99 const MCExpr *PC = MCSymbolRefExpr::create(PCSym, Context); in getExprForFDESymbol() local 100 return MCBinaryExpr::createSub(Res, PC, Context); in getExprForFDESymbol()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
H A D | ARCBranchFinalize.cpp | 152 unsigned PC = 0; in runOnMachineFunction() local 155 BlockToPCMap.insert(std::make_pair(&MBB, PC)); in runOnMachineFunction() 165 BranchToPCList.emplace_back(&MI, PC); in runOnMachineFunction() 167 PC += Size; in runOnMachineFunction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCAsmInfo.cpp | 64 const MCExpr *PC = MCSymbolRefExpr::create(PCSym, Context); in getExprForPersonalitySymbol() local 65 return MCBinaryExpr::createSub(Res, PC, Context); in getExprForPersonalitySymbol()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/DWARF/ |
H A D | DWARFDebugLine.h | 162 /// containg this PC. If relocation information is present then section 232 bool containsPC(object::SectionedAddress PC) const { in containsPC() 233 return SectionIndex == PC.SectionIndex && in containsPC() 234 (LowPC <= PC.Address && PC.Address < HighPC); in containsPC()
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/third_party/python/Tools/buildbot/ |
H A D | remoteDeploy.bat | 36 ssh %SSH_SERVER% "md %REMOTE_PYTHON_DIR%PC"
49 scp "%PYTHON_SOURCE%PC\pyconfig.h" "%SSH_SERVER%:%REMOTE_PYTHON_DIR%PC"
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/third_party/python/Lib/lib2to3/ |
H A D | fixer_base.py | 66 PC = PatternCompiler() 67 self.pattern, self.pattern_tree = PC.compile_pattern(self.PATTERN,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/lib/Support/ |
H A D | Signals.cpp | 59 static FormattedNumber format_ptr(void *PC) { in format_ptr() argument 62 return format_hex((uint64_t)PC, PtrWidth); in format_ptr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/MCDisassembler/ |
H A D | Disassembler.cpp | 245 // the PC parameter. If a valid instruction can be disassembled its string is 253 uint64_t BytesSize, uint64_t PC, char *OutString, in LLVMDisasmInstruction() 256 // Wrap the pointer to the Bytes, BytesSize and PC in a MemoryObject. in LLVMDisasmInstruction() 266 S = DisAsm->getInstruction(Inst, Size, Data, PC, Annotations); in LLVMDisasmInstruction() 279 IP->printInst(&Inst, PC, AnnotationsStr, *DC->getSubtargetInfo(), in LLVMDisasmInstruction() 252 LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes, uint64_t BytesSize, uint64_t PC, char *OutString, size_t OutStringSize) LLVMDisasmInstruction() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 90 MI.getOperand(OI).getReg() == ARM::PC) { in getARMStoreDeprecationInfo() 91 Info = "use of SP or PC in the list is deprecated"; in getARMStoreDeprecationInfo() 113 case ARM::PC: in getARMLoadDeprecationInfo() 123 Info = "use of LR and PC simultaneously in the list is deprecated"; in getARMLoadDeprecationInfo() 185 InitARMMCRegisterInfo(X, ARM::LR, 0, 0, ARM::PC); in createARMMCRegisterInfo() 273 Target = Addr+Imm+8; // In ARM mode the PC is always off by 8 bytes. 303 // In Thumb mode the PC is always off by 4 bytes.
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 35 : MSP430GenRegisterInfo(MSP430::PC) {} in MSP430RegisterInfo() 82 Reserved.set(MSP430::PC); in getReservedRegs() 118 // Skip the saved PC in eliminateFrameIndex()
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/third_party/skia/third_party/externals/abseil-cpp/absl/debugging/ |
H A D | symbolize_test.cc | 442 __asm__ __volatile__("call 1f;\n 1: pop %[PC]" : [ PC ] "=r"(pc)); in inline_func() 444 __asm__ __volatile__("leaq 0(%%rip),%[PC];\n" : [ PC ] "=r"(pc)); in inline_func() 452 __asm__ __volatile__("call 1f;\n 1: pop %[PC]" : [ PC ] "=r"(pc)); in non_inline_func() 454 __asm__ __volatile__("leaq 0(%%rip),%[PC];\n" : [ PC ] "=r"(pc)); in non_inline_func()
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