| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeARM_64.c | 115 #define ORR 0xaa000000 macro
548 /* A large amount of number can be constructed from ORR and MOVx, but computing them is costly. */ in load_immediate()
783 return push_inst(compiler, ORR | RD(dst) | RN(TMP_ZERO) | RM(arg2)); in emit_op_imm()
807 return push_inst(compiler, (ORR ^ W_OP) | RD(dst) | RN(TMP_ZERO) | RM(arg2)); in emit_op_imm()
854 FAIL_IF(push_inst(compiler, (ORR ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2))); in emit_op_imm()
1068 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S0 - saved_arg_count) | RN(TMP_ZERO) | RM(tmp))); in sljit_emit_enter()
1275 FAIL_IF(push_inst(compiler, ORR | RD(TMP_REG1) | RN(TMP_ZERO) | RM(src))); in sljit_emit_return_to()
1305 FAIL_IF(push_inst(compiler, ORR | RD(TMP_REG1) | RN(TMP_ZERO) | RM(SLJIT_R0))); in sljit_emit_op0()
1310 FAIL_IF(push_inst(compiler, (ORR ^ inv_bits) | RD(TMP_REG1) | RN(TMP_ZERO) | RM(SLJIT_R0))); in sljit_emit_op0()
1553 return push_inst(compiler, (ORR in sljit_emit_shift_into()
[all...] |
| H A D | sljitNativeARM_32.c | 109 #define ORR 0xe1800000 macro
1553 return push_inst(compiler, ORR | (flags & SET_FLAGS) | RD(dst) | RN(src1) | ((src2 & SRC2_IMM) ? src2 : RM(src2))); in emit_single_op()
1765 FAIL_IF(push_inst(compiler, (positive ? ORR : BIC) | RD(reg) | RN(reg) | imm2)); in generate_int()
2271 return push_inst(compiler, ORR | RD(src_dst) | RN(src_dst) | RM(src1) | ((sljit_uw)(is_left ? 1 : 0) << 5) | ((sljit_uw)src2w << 7)); in sljit_emit_shift_into()
2282 return push_inst(compiler, ORR | RD(src_dst) | RN(src_dst) | RM(TMP_REG1) | ((sljit_uw)(is_left ? 1 : 0) << 5) | 0x10 | RM8(TMP_REG2)); in sljit_emit_shift_into()
3117 ins = (op == SLJIT_AND ? AND : (op == SLJIT_OR ? ORR : EOR)); in sljit_emit_op_flags()
3320 return push_inst(compiler, ORR | RD(reg) | RN(tmp_reg) | RM(TMP_REG2) | (16 << 7)); in sljit_emit_mem_unaligned()
3372 FAIL_IF(push_inst(compiler, ORR | RD(tmp_reg) | RN(tmp_reg) | RM(TMP_REG2) | (shift << 7))); in sljit_emit_mem_unaligned()
3384 return push_inst(compiler, ORR | RD(reg) | RN(tmp_reg) | RM(TMP_REG2) | (shift << 7)); in sljit_emit_mem_unaligned()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | constants-arm64.h | 597 ORR = 0x20000000,
598 ORN = ORR | NOT,
612 ORR_w_imm = LogicalImmediateFixed | ORR,
613 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits,
631 ORR_w = LogicalShiftedFixed | ORR,
632 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
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| H A D | macro-assembler-arm64.cc | 191 case ORR: // Fall through. in LogicalMacro()
207 case ORR: in LogicalMacro()
709 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR); in TryOneInstrMoveImmediate()
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| H A D | macro-assembler-arm64-inl.h | 61 LogicalMacro(rd, rn, operand, ORR); in Orr()
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| H A D | assembler-arm64.cc | 935 Logical(rd, rn, operand, ORR); in orr()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | constants-arm.h | 132 ORR = 12 << 21, // Logical (inclusive) OR. enumerator
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| H A D | assembler-arm.cc | 1227 (opcode == BIC) || (opcode == EOR) || (opcode == ORR) || in AddrMode1()
1628 AddrMode1(cond | ORR | s, dst, src1, src2); in orr()
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| /third_party/vixl/src/aarch64/ |
| H A D | constants-aarch64.h | 749 ORR = 0x20000000, enumerator
750 ORN = ORR | NOT,
764 ORR_w_imm = LogicalImmediateFixed | ORR,
765 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits,
783 ORR_w = LogicalShiftedFixed | ORR,
784 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
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| H A D | macro-assembler-aarch64.cc | 842 LogicalMacro(rd, rn, operand, ORR); in Emit()
913 case ORR: in Emit()
931 case ORR: in Emit()
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| H A D | simulator-aarch64.cc | 4046 case ORR: in Simulator()
9726 logical_op = ORR; in Simulator()
11142 SVEBitwiseLogicalUnpredicatedHelper(ORR, vform, result, zdn, zm); in Simulator()
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| H A D | assembler-aarch64.cc | 618 Logical(rd, rn, operand, ORR); in orr()
5919 ORR);
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| H A D | logic-aarch64.cc | 7155 case ORR:
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
| H A D | assembler_arm.cc | 267 EmitType01(cond, o.type(), ORR, 0, rn, rd, o);
272 EmitType01(cond, o.type(), ORR, 1, rn, rd, o);
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| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.cc | 2567 case ORR: { in DecodeType01()
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 1904 case ORR:
|